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Cranky on a Cold Day! Guaranteeing Automotive System Minimum Input Volts 

 由 Kieran McDonald 发布 - 2014-12-16 10:34:52.0

The normal voltage level of what is designated as a 12 V vehicle lead acid battery may vary between 9 V and 16 V.  However, subject to extreme cold temperatures, the battery voltage level when the starter is engaged can be as low as 3.0 V, a condition that might last for as long as 19 mS.   The conventional vehicle power supply architecture can be adapted to guarantee vehicle system operation through such conditions.  

So what happens at cold-crank that causes the voltage to be so low?  The battery terminal voltage is a function of its off-load voltage and the voltage drop across its internal resistance.  Current is drawn from the battery, and a voltage is dropped across its internal resistance, which increases with current.  The battery internal resistance is not a constant but a function of temperature, and as the temperature falls, the loaded battery terminal voltage falls further.  So, we now have down to 3.0 V at the system input, but of course this is not the input voltage that the vehicle power supply will see; this will in fact be lower due to the series resistance of the reverse polarity protection and input filter circuits.  The input voltage to the system power supply could in fact be as low as 2.0 V.  Most system power supplies down convert normal battery input voltage to 5.0 V or 3.3 V.  Irrespective of whether that system power supply is a linear voltage regulator or a buck switched mode power supply (SMPS), 2.0 V on its input will either put it into drop-out or incur under voltage lock-out (UVLO) before the internal voltage rail collapses.  So we have a power supply that doesn’t function at cold-crank!

Subject to such a condition the system designer looks to increase or boost that 2.0 V input voltage to a level that prevents the system power supply from entering drop-out or UVLO.  A conventional boost topology could do this so long as it can sustain the higher voltage transients it may encounter such as double-battery and load dump.

Fig. 1 – Conventional Boost Topology using NCV8871

 

However, in designing to this requirement there are numerous considerations, some of which may discount a conventional boost.  Any boost has a natural duty cycle limitation caused by increasing losses at high duty cycles, causing the output voltage (Vout) to collapse at a given duty-cycle.  This is commonly referred to as latch-up and most boost designs will have a Vout limitation of somewhere between three and five times the input voltage (Vin), depending upon the efficiency of the design, for high duty cycles.  In continuous conduction mode (CCM) this transfer function has less of a load dependency than in discontinuous conduction mode (DCM).  As a result, for most designs at a given duty cycle, the DCM boost design will give a higher Vin to Vout transfer function, allowing lower input voltages to be reached.

As previously mentioned, any series losses of the input filter and reverse polarity protection diode reduce the input voltage level to the boost stage.  The input filter itself presents a certain output impedance to the input of the boost.  If this output impedance is greater than that of the boost stage then oscillations can occur due to negative input impedance, making the input inductor and capacitor choice critical.

A certain minimum input capacitance value is also required to slew the input voltage as it changes.  Due to the need to operate at very low input voltages the boost’s bandwidth is limited to often less than 10 KHz.  This limited bandwidth results in loop latency that often is insufficiently fast to track changes to input voltage.  The input capacitance can make up for this deficiency by slewing the rate of change in the input voltage, giving the loop time to catch up. 

For those permanently powered systems requiring a low quiescent current (Iq), the boost needs to be activated when the input voltage falls below a certain level.  This typically might entail a schmitt trigger monitoring the input voltage across a resistor divider.  Automotive designs often place limitations on the maximum resistor value, compelling the use of relatively low value resistors in the divider, and a significant leakage current as a result.  The feedback voltage resistor divider, comparator and the boost integrated circuit (IC) all contribute to the Iq. 

The ON Semiconductor NCV8876 and NCV8877 non-synchronous boost controllers present an ‘intelligent’ low frequency boost controller intended specifically to function at such low input voltage automotive systems.

Fig. 2 - NCV8876 Block Diagram

 

With a dedicated pin for both monitoring input voltage and supplying the IC, the monitoring function utilises an integrated resistor divider, which is disconnected in sleep mode to achieve a very low Iq.  This compares the input voltage to three internally programmed thresholds, which in the event of a falling input voltage crossing these thresholds firstly to wake the IC (Wakeup Threshold) and then secondly regulate the output voltage (Regulation).  The third threshold triggers the IC into its low Iq sleep mode (Sleep Threshold) as the input voltage rises.  Conventional boost controller ICs have a soft-start (where Vout typically rises exponentially at start-up), prohibiting a rapid response during battery voltage cold crank voltage sag.  The NCV8876 and NCV8877 don’t have a soft-start delay allowing a rapid response to achieve output regulation, the compensation amplifier pre-charging the compensation capacitor at wakeup (STATUS low). 

Fig. 3 - NCV8876 Functional Waveforms

 

Cranky on a cold day?  Cold-cranking repetitively all day?  The NCV8876 and NCV8877 hold the keys.

标签:Automotive

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