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The NLV74VHC1GT126 is a single gate noninverting 3-state buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The NLV74VHC1GT126 requires the 3-state control input (OE(bar)) to be set Low to place the output into the high impedance state. The device input is compatible with TTL-type input thresholds and the output has a full 5V CMOS level output swing. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic-level translator from 3.0V CMOS logic to 5.0V CMOS Logic or from 1.8V CMOS logic to 3.0V CMOS Logic while operating at the high-voltage power supply. The NLV74VHC1GT126 input structure provides protection when voltages up to 5.5V are applied, regardless of the supply voltage. This allows the NLV74VHC1GT126 to be used to interface 5V circuits to 3V circuits. The output structures also provide protection when VCC = 0V. These input and output structures help prevent device destruction caused by supply voltage - input/output voltage mismatch, battery backup, hot insertion, etc.
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M74VHC1GT126DF1G-L22038
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M74VHC1GT126DT1G
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MC74VHC1GT126P5T5G-L22088
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NLVVHC1GT126DF1G
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NLVVHC1GT126DF2G
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NLVVHC1GT126DT1G
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Die Related Summary Data
Device: M74VHC1GT126DF1G-L22038
Equivalent to wafer fab process: CMOS SUB
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等效器件小时
平均故障间隔时间/平均无故障时间(按小时计算)
FITS
CMOS SUB
2
920154574
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Data is based on the following assumptions.
Note: The temperature and confidence level may be adjusted to your requirements.
Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)