BCD 至 7 段液晶锁存/解码器/驱动器

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MC14543B BCD 至 7 段锁存/解码器/驱动器设计用于液晶读数,并且采用互补 MOS (CMOS) 增强型器件构建。该电路提供 4 位存储锁存、8421 BCD-7 段解码器和驱动器的功能。该器件具有反相输出组合的逻辑电平的功能。相位 (Ph)、间隔 (BI) 和锁存禁用 (LD) 输入分别用于反转真值表相位,间隔显示并存储 BCD 代码。对于液晶 (LC) 读数,将方波施加到电路的 Ph 输入和显示器的电公用底板。电路的输出直接联接到 LC 读数的各个分段。对于其他类型的读数,例如发光二极管 (LED)、白炽灯、气体排放和荧光灯读数,此数据表上给出了联接图。应用包括仪器(如计数器、DVM 等)显示驱动器、计算机/计算器显示驱动器、操舵显示驱动器和各种时钟、表和计时器用途。

  • Latch Storage of Code
  • Blanking Input
  • Readout Blanking on All Illegal Input Combinations
  • Direct LED (Common Anode or Cathode) Driving Capability
  • Supply Voltage Range = 3.0 V to 18 V
  • Capable of Driving Two Low-power TTL Loads, One Low-power Schottky TTL Load or Two HTL Loads Over the Rated Temperature Range
  • Pin-for-Pin Replacement for CD4056A (with Pin 7 Tied to VSS).
  • Chip Complexity: 207 FETs or 52 Equivalent Gates
  • Pb-Free Packages are Available

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MC14543BDG

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Active

CAD Model

Pb

A

H

P

SOIC-16

1

260

TUBE

48

N

Latch

1

3

18

660

10

$0.2937

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MC14543BDR2G

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Active

CAD Model

Pb

A

H

P

SOIC-16

1

260

REEL

2500

N

Latch

1

3

18

660

10

$0.2364

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NLV14543BDR2G

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Active

CAD Model

Pb

A

H

P

SOIC-16

1

260

REEL

2500

Y

Latch

1

3

18

660

10

$0.2331

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