D Flip-Flops and JK Flip-Flops | MC74AC74

双 D 触发器正向边触发器

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MC74AC74/74ACT74 是一款双 D 型触发器，带异步清除 和设置输入，以及互补 (Q, Q) 输出。输入处的信息 在时钟脉冲的正向边传输到输出。时钟触发发生在时钟脉冲的某个电压水平，与正向脉冲的传输时间不直接相关。超过时钟脉冲输入阈值电压后， 数据输入锁闭，存在的信息不会传输到输出， 直到时钟脉冲输入的下一个上升边。异步输入： SD（设置）的低电平输入会将 Q 设置为高电平，CD （清除）的低电平输入会将 Q 设置为低电平清除，设置与时钟无关，CD 和 SD 上的同时低电平会使得 Q 和 Q 均为高电平。

  • Outputs Source/Sink 24 mA
  • ACT74 Has TTL Compatible Inputs CD1SD2 D1Q1CP2 Q2
  • Pb-Free Packages Are Available

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MC74AC74DG

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Pb

A

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SOIC-14

751A-03

1

260

TUBE

55

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D-Type

2

2

6

9.5

24

$0.2541

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MC74AC74DR2G

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Pb

A

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SOIC-14

751A-03

1

260

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2500

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2

2

6

9.5

24

$0.1304

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MC74AC74DR2G-Q

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Pb

A

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P

SOIC-14

751A-03

1

260

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2500

F

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2

2

6

9.5

24

$0.1191

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MC74AC74DTR2G

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TSSOP-14 WB

948G

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260

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2500

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D-Type

2

2

6

9.5

24

$0.1408

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NLV74AC74DR2G

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Pb

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H

P

SOIC-14

751A-03

1

260

REEL

2500

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2

2

6

9.5

24

Price N/A

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可靠性数据

Die Related Summary Data

Device: MC74AC74DG

Equivalent to wafer fab process: CMOS SUB

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等效器件小时

平均故障间隔时间/平均无故障时间（按小时计算）

FITS

CMOS SUB

2

920154574

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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