Buffers | MC74HC126A

四路非反相缓冲器，3 态

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高性能硅门极 CMOS MC74HC125A 和 MC74HC126A 与 LS125 和 LS126 的引脚输出相同。该器件输入兼容标准的 CMOS 输出；带有上拉电阻器，可兼容 LSTTL 输出。 HC125A 和 HC126A 非反相缓冲器适用于 3 态内存地址驱动器、时钟驱动器和其他总线导向系统。此类器件具有四个单独的输出启用，为有效低电平 (HC125A) 或有效高电平 (HC126A)。

  • Output Drive Capability: 15 LSTTL Loads
  • Outputs Directly Interface to CMOS, NMOS, and TTL
  • Operating Voltage Range: 2.0 to 6.0 V
  • Low Input Current: 1.0 mA
  • High Noise Immunity Characteristic of CMOS Devices
  • In Compliance with the Requirements Defined by JEDEC Standard No. 7A
  • Chip Complexity: 72 FETs or 18 Equivalent Gates
  • Pb-Free Packages are Available

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MC74HC126ADR2G

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Pb

A

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SOIC-14

751A-03

1

260

REEL

2500

N

4

3-State

2

6

24

6

$0.1167

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MC74HC126ADR2G-Q

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Pb

A

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SOIC-14

751A-03

1

260

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2500

F

4

3-State

2

6

24

6

$0.1616

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MC74HC126ADTR2G

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Pb

A

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TSSOP-14 WB

948G

1

260

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2500

N

4

3-State

2

6

24

6

$0.1701

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MC74HC126ADTR2G-Q

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CAD Model

Pb

A

H

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TSSOP-14 WB

948G

1

260

REEL

2500

F

4

3-State

2

6

24

6

$0.1781

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可靠性数据

Die Related Summary Data

Device: MC74HC126ADR2G

Equivalent to wafer fab process: CMOS SUB

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等效器件小时

平均故障间隔时间/平均无故障时间（按小时计算）

FITS

CMOS SUB

2

920154574

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Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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