D Flip-Flops and JK Flip-Flops | MC74HC374A

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高性能硅门极 CMOS MC74HC374A 与 LS374 的引脚输出相同。 该器件输入兼容标准的 CMOS 输出；带有上拉电阻器，可兼容 LSTTL 输出。 符合设置时间要求的数据计时到带有时钟上升边的输出。输出启用输入不影响触发器的状态，但当输出启用为高电平时，所有器件输出均强制为高阻抗状态，因此即使输出不启用时数据也可以存储。 HC374A 与 HC574A 功能相同，后者在封装的输出对侧上具有输入引脚。此器件的功能与 HC534A 相似，后者具有反向输出。

  • Output Drive Capability: 15 LSTTL Loads
  • Outputs Directly Interface to CMOS, NMOS, and TTL
  • Operating Voltage Range: 2.0 to 6.0 V
  • Low Input Current: 1.0 mA
  • High Noise Immunity Characteristic of CMOS Devices
  • In Compliance with the Requirements Defined by JEDEC Standard No. 7A
  • Chip Complexity: 266 FETs or 66.5 Equivalent Gates
  • Pb-Free Packages are Available*

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MC74HC374ADTG

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Pb

A

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TSSOP-20

9.48

1

260

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75

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MC74HC374ADTR2G

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260

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2500

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$0.2015

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MC74HC374ADWG

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SOIC-20W

751D-05

3

260

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38

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$0.3411

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MC74HC374ADWR2G

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SOIC-20W

751D-05

3

260

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1000

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6

$0.28

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NLV74HC374ADTR2G

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Pb

A

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TSSOP-20

9.48

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260

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2500

N

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8

2

6

25

6

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NLV74HC374ADWG

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Pb

A

H

P

SOIC-20W

751D-05

3

260

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38

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8

2

6

25

6

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NLV74HC374ADWR2G

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Pb

A

H

P

SOIC-20W

751D-05

3

260

REEL

1000

N

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8

2

6

25

6

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可靠性数据

Die Related Summary Data

Device: MC74HC374ADTG

Equivalent to wafer fab process: CMOS SUB

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等效器件小时

平均故障间隔时间/平均无故障时间（按小时计算）

FITS

CMOS SUB

2

920154574

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Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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