Arithmetic Logic Functions | MC74HC4040A

12 级二进制波纹计数器

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MC74C4040A 与标准 CMOS MC14040 的引脚输出相同。该器件输入兼容标准的 CMOS 输出；带有上拉电阻器，可兼容 LSTTL 输出。 该器件由 12 个主-从触发器组成。每个触发器的输出馈送到下一个触发器，每个输出处的频率为上一个的一半。该状态计数器在时钟输入的负向边前进一次。重置为异步和有效高电平。 由于内部波纹延迟，Q 输出的状态变化不会同时发生。因此，解码的输出信号容易发生解码尖峰，对于某些设计可能必须使用 HC4040A 的时钟进行门控。

  • Output Drive Capability: 10 LSTTL Loads
  • Outputs Directly Interface to CMOS, NMOS, and TTL
  • Operating Voltage Range: 2 to 6 V
  • Low Input Current: 1 uA
  • High Noise Immunity Characteristic of CMOS Devices
  • In Compliance With JEDEC Standard No. 7A Requirements
  • Chip Complexity: 398 FETs or 99.5 Equivalent Gates
  • Pb-Free Packages are Available*

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MC74HC4040ADG

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Pb

A

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SOIC-16

751B-05

1

260

TUBE

48

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2

6

31

0.75

5.2

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MC74HC4040ADR2G

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Pb

A

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SOIC-16

751B-05

1

260

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2500

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2

6

31

0.75

5.2

$0.2396

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MC74HC4040ADTR2G

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TSSOP-16

948F-01

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260

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2500

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2

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5.2

$0.1628

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NLV74HC4040ADR2G

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Pb

A

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P

SOIC-16

751B-05

1

260

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2500

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2

6

31

0.75

5.2

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Die Related Summary Data

Device: MC74HC4040ADG

Equivalent to wafer fab process: CMOS SUB

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等效器件小时

平均故障间隔时间/平均无故障时间（按小时计算）

FITS

CMOS SUB

2

920154574

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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