Dual D Flip-Flop with Set and Reset

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High-Performance Silicon-Gate CMOS

The MC574HC74A is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

This device consists of two D flip-flops with individual Set, Reset, and Clock inputs. Information at a D-input is transferred to the corresponding Q output on the next positive going edge of the clock input. Both Q and Qbar outputs are available from each flip-flop. The Set and Reset inputs are asynchronous.

  • Output Drive Capability: 10 LSTTL Loads
  • Outputs Directly Interface to CMOS, NMOS, and TTL
  • Operating Voltage Range: 2.0 to 6.0 V
  • Low Input Current: 1.0 mA
  • High Noise Immunity Characteristic of CMOS Devices
  • In Compliance with the Requirements Defined by JEDEC Standard No. 7A
  • Chip Complexity: 128 FETs or 32 Equivalent Gates
  • Pb-Free Packages are Available

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MC74HC74ADG

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CAD Model

Pb

A

H

P

SOIC-14

1

260

TUBE

55

N

D-Type

2

2

6

20

4

$0.2247

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MC74HC74ADR2G

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Active

CAD Model

Pb

A

H

P

SOIC-14

1

260

REEL

2500

N

D-Type

2

2

6

20

4

$0.1871

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MC74HC74ADTR2G

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CAD Model

Pb

A

H

P

TSSOP-14 WB

1

260

REEL

2500

N

D-Type

2

2

6

20

4

$0.2145

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