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NB3M8T3910G: Differential Clock Fanout Buffer with LVCMOS Reference Output, Configurable, 2.5 V/3.3 V 3:1:10

Overview
Specifications
Datasheet: 2.5 V /3.3 V 3:1:10 Configurable Differential Clock Fanout Buffer with LVCMOS Reference Output
Rev. 1 (177kB)
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Product Overview
产品说明
The NB3M8T3910G is a 3:1:10 Clock fanout buffer operating on a 2.5 V/3.3 V Core VDD and a flexible 2.5 V / 3.3 V VDDO supply (VDDO ≤ VDD). A 3:1 Mux selects between Crystal oscillator inputs, or either of two differential Clock inputs capable of accepting LVPECL, LVDS, HCSL, or SSTL levels. The MUX select lines, SEL0 and SEL1, accept LVCMOS or LVTTL levels and select input per Table 3. The Crystal input is disabled when a Clock input is selected. Differential Outputs consist of two banks of five differential outputs with each bank independently mode configurable as LVPECL, LVDS, HCSL. Each bank of differential output pairs is configured with a pair of SMODEAx/Bx select lines using LVCMOS or LVTTL levels per Table 6. Clock input levels and outputs states are determined per Table 5. The Single−Ended LVCMOS Output, REFOUT, is synchronously enabled by the OE_SE control line per Table 4 using LVCMOS / LVTTL levels. For Clock frequencies above 250 MHz, the REFOUT line should be disabled.
特性
 
  • Crystal, Single-Ended or Differential Input Reference Clocks
  • Differential Input Pair can Accept: LVPECL, LVDS, HCSL, SSTL
  • Two Output Banks: Each has Five Differential Outputs Configurable as LVPECL, LVDS, or HCSL by SMODEAx/Bx Pins
  • One Single−Ended LVCMOS Output with Synchronous OE Control
  • LVCMOS/LVTTL Interface Levels for all Control Inputs
  • Clock Frequency: Up to 1400 Mhz, Typical
  • Output Skew: 50 ps (Max)
  • Additive RMS Jitter <0.03 ps (156.25 MHz, Typical)
  • Input to Output Propagation Delay (900 ps Typical)
  • Operating Supply Modes VDD/VDDO: 2.5 V/2.5 V, 3.3 V/3.3 V or 3.3 V/2.5 V
  • Industrial Temperature Range −40°C to 85°C
应用   终端产品
  • Clock Distrubtion
  • Telecom
  • Networking
  • Backplane
  • High End Computing
  • Wireless and Wired Infrastructure
 
  • Servers
  • Ethernet Switch/Routers
  • ATE, Test and Measurement
技术文档及设计资源
仿真模型 (1) 封装图纸 (1)
数据表 (1) 评估板文档 (1)
评估/开发工具信息
产品 状况 Compliance 简短说明 行动
NB3M8T3910GEVB Active
Pb-free
NB3M8T3910G Custom Evaluation Board
Avnet (2015-07-09) : 1
Mouser (2015-07-09) : 2
供货情况和样品
产品
状况
Compliance
具体说明
封装
MSL*
容器
预算价格 (1千个数量的单价)
类型
外形
类型
数量
NB3M8T3910GMNR2G Active
Pb-free
Halide free
Differential Clock Fanout Buffer with LVCMOS Reference Output, Configurable, 2.5 V/3.3 V 3:1:10 QFN-48 485AJ 1 Tape and Reel 2500 Contact Sales Office
表面贴装器件的潮湿敏感度等级(MSL)(260°C回流温度时测量无铅,235°C回流温度时测量含铅)
市场订货至交货的时间(周) : 4 to 8
ON Semiconductor   (2015-07-08) : 2,500
Datasheet: 2.5 V /3.3 V 3:1:10 Configurable Differential Clock Fanout Buffer with LVCMOS Reference Output
Rev. 1 (177kB)
»查看材料成分
»No Product Change Notifications exist
GreenPoint®设计工具
Product Overview

Product Compliance Status Description Type Channels Input / Output Ratio Input Level Output Level VCC Typ (V) tJitterRMS Typ (ps) tskew(o-o) Max (ps) tpd Typ (ns) tR & tF Max (ps) fmaxClock Typ (MHz) fmaxData Typ (Mbps) Package Type
 Pb-free 
 Halide free 
 Active     Differential Clock Fanout Buffer with LVCMOS Reference Output, Configurable, 2.5 V/3.3 V 3:1:10   Buffer   1   3:1:10 
 HCSL 
 LVDS 
 LVPECL 
 SSTL 
 HCSL 
 LVCMOS 
 LVDS 
 LVPECL 
 2.5 
 3.3 
 0.03   50   0.9   325   1400     QFN-48 
Datasheet: 2.5 V /3.3 V 3:1:10 Configurable Differential Clock Fanout Buffer with LVCMOS Reference Output
Rev. 1 (177kB)
»查看材料成分
»No Product Change Notifications exist
GreenPoint®设计工具
Product Overview
外形
485AJ   
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