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NB6L14S: Clock / Data Fanout Buffer, 1:4 AnyLevel™ Input, LVDS, 2.5 V

Overview
Specifications
Datasheet: 2.5 V 1:4 AnyLevel Differential Input to LVDS Fanout Buffer
Rev. 2 (235.0kB)
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Product Overview
产品说明
The NB6L14S is a differential 1:4 Clock or Data Receiver and will accept AnyLevel differential input signals: LVPECL, CML, LVDS, or HSCL. These signals will be translated to LVDS and four identical copies of Clock or Data will be distributed, operating up to 2.0GHz or 2.5Gbps, respectively. As such, the NB6L14S is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The NB6L14S has a wide input common mode range from GND plus 50mV to VCC-50mV. Combined with the 50-ohm internal termination resistors at the inputs, the NB6L14S is ideal for translating a variety of differential or single-ended Clock or Data signals to 350mV typical LVDS output levels. The NB6L14S is the 2.5V version of the NB6N14S and is offered in a small 3mm x 3mm 16-QFN package. Application notes, models, and support documentation are available at www.onsemi.com. The NB6L14S is a member of the ECLinPS MAX family of high performance products.
特性
 
  • Maximum Input Clock Frequency > 2.0 GHz
  • Maximum Input Data Rate > 2.5 Gbps
  • 1ps Maximum of RMS Clock Jitter
  • 120ps Typical Rise and Fall Times
  • VREFAC Reference Output
应用   终端产品
  • Networking
 
  • Routers
技术文档及设计资源
仿真模型 (1) 封装图纸 (1)
数据表 (1)  
供货情况和样品
产品
状况
Compliance
具体说明
封装
MSL*
容器
预算价格 (1千个数量的单价)
类型
外形
类型
数量
NB6L14SMNG Active
Pb-free
Halide free
Clock / Data Fanout Buffer, 1:4 AnyLevel™ Input, LVDS, 2.5 V QFN-16 485G-01 1 Tube 123 Contact Sales Office
NB6L14SMNTWG Active
Pb-free
Halide free
Clock / Data Fanout Buffer, 1:4 AnyLevel™ Input, LVDS, 2.5 V QFN-16 485G-01 1 Tape and Reel 3000 Contact Sales Office
NB6L14SMNTXG Active
Pb-free
Halide free
Clock / Data Fanout Buffer, 1:4 AnyLevel™ Input, LVDS, 2.5 V QFN-16 485G-01 1 Tape and Reel 3000 Contact Sales Office
表面贴装器件的潮湿敏感度等级(MSL)(260°C回流温度时测量无铅,235°C回流温度时测量含铅)
市场订货至交货的时间(周) : 2 to 4
Avnet   (2015-07-09) : >1K
Digikey   (2015-07-09) : <1K
Mouser   (2015-07-09) : <1K
ON Semiconductor   (2015-07-08) : 4,059
市场订货至交货的时间(周) : 8 to 12
市场订货至交货的时间(周) : 8 to 12
Datasheet: 2.5 V 1:4 AnyLevel Differential Input to LVDS Fanout Buffer
Rev. 2 (235.0kB)
»查看材料成分
»产品更改通知 (1)
Product Overview

Product Compliance Status Description Type Channels Input / Output Ratio Input Level Output Level VCC Typ (V) tJitterRMS Typ (ps) tskew(o-o) Max (ps) tpd Typ (ns) tR & tF Max (ps) fmaxClock Typ (MHz) fmaxData Typ (Mbps) Package Type
 Pb-free 
 Halide free 
 Active     Clock / Data Fanout Buffer, 1:4 AnyLevel™ Input, LVDS, 2.5 V   Buffer   1   1:4 
 CML 
 CMOS 
 ECL 
 HCSL 
 HSTL 
 LVDS 
 TTL 
 LVDS   2.5   0.5   20   0.45   225   2000   2500   QFN-16 
 Pb-free 
 Halide free 
 Active     Clock / Data Fanout Buffer, 1:4 AnyLevel™ Input, LVDS, 2.5 V   Buffer   1   1:4 
 CML 
 CMOS 
 ECL 
 HCSL 
 HSTL 
 LVDS 
 TTL 
 LVDS   2.5   0.5   20   0.45   225   2000   2500   QFN-16 
 Pb-free 
 Halide free 
 Active     Clock / Data Fanout Buffer, 1:4 AnyLevel™ Input, LVDS, 2.5 V   Buffer   1   1:4 
 CML 
 CMOS 
 ECL 
 HCSL 
 HSTL 
 LVDS 
 TTL 
 LVDS   2.5   0.5   20   0.45   225   2000   2500   QFN-16 
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