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NB7L111M: Clock / Data Driver, 2:1:10 Differential, 6.125 Gbps, 2.5 V / 3.3 V, with CML Output

Overview
Specifications
Datasheet: 2.5V / 3.3V, 6.125Gb/s 2:1:10 Differential Clock / Data Driver with CML Output
Rev. 7 (187kB)
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Product Overview
产品说明
The NB7L111M is a low skew 2:1:10 differential clock/data driver, designed with clock/data distribution in mind. It accepts two clock/data sources into multiplexer input and reproduces ten identical CML differential outputs. This device is ideal for clock/data distribution across the backplane or a board, and redundant clock switchover applications.
The input signals can be either differential or single-ended (if the external reference voltage is provided). Differential inputs incorporate internal 50 Ohm termination resistors and accept Negative ECL (NECL), Positive ECL (PECL), LVCMOS, LVTTL, CML, or LVDS (using appropriate power supplies). The differential 16 mA CML output provides matching internal 50 Ohm termination, and 400 mV output swing when externally terminated 50 Ohm to VCC.
The NB7L111M operates from a 2.5 V +/-5% supply or a 3.3 V +/- 5% supply and is guaranteed over the full industrial temperature range of -40C to +85C. This device is packaged in a low profile 8x8 mm, QFN−52 package with 0.5 mm pitch (see package dimension on the back of the datasheet).
Application notes, models, and support documentation are available at www.onsemi.com.
特性
 
  • Maximum Input Clock Frequency > 5.5 GHz Typical
  • Maximum Input Data Rate > 6.125 Gb/s Typical
  • < 0.5 ps Maximum Clock RMS Jitter
  • < 15 ps Maximum Data Dependent Jitter at 3.125 Gb/s
  • 50 ps Typical Rise and Fall Times
  • 240 ps Typical Propagation Delay
  • 2 ps Typical Duty Cycle Skew
  • 10 ps Typical Within Device Skew
  • 15 ps Typical Device-to-Device Skew
  • Operating Range: 2.5 V ±5% and 3.3 V ±5%
  • 400 mV Differential CML Output Swing
  • 50 Ω Internal Input and Output Termination Resistors
  • Pb-Free Packages are Available
应用
  • SATA, PCI Express Gen2 4xFC & GbE Data Fan-out
  • Precision Clock Distribution / Switchover
技术文档及设计资源
应用注释 (14) 封装图纸 (1)
数据表 (1)  
供货情况和样品
产品
状况
Compliance
具体说明
封装
MSL*
容器
预算价格 (1千个数量的单价)
类型
外形
类型
数量
NB7L111MMNG Active
Pb-free
Halide free
Clock / Data Driver, 2:1:10 Differential, 6.125 Gbps, 2.5 V / 3.3 V, with CML Output QFN-52 485M 1 Tray JEDEC 260 Contact Sales Office
NB7L111MMNR2G Active
Pb-free
Halide free
Clock / Data Driver, 2:1:10 Differential, 6.125 Gbps, 2.5 V / 3.3 V, with CML Output QFN-52 485M 1 Tape and Reel 2000 Contact Sales Office
表面贴装器件的潮湿敏感度等级(MSL)(260°C回流温度时测量无铅,235°C回流温度时测量含铅)
市场订货至交货的时间(周) : 2 to 4
Arrow   (Sat Jul 11 08:05:19 MST 2015) : 245
Avnet   (2015-07-09) : <1K
Digikey   (2015-07-09) : <1K
Mouser   (2015-07-09) : In Stock
ON Semiconductor   (2015-07-08) : 260
PandS   (2015-07-09) : <100
市场订货至交货的时间(周) : 4 to 8
Datasheet: 2.5V / 3.3V, 6.125Gb/s 2:1:10 Differential Clock / Data Driver with CML Output
Rev. 7 (187kB)
»查看材料成分
»产品更改通知 (2)
Product Overview

Product Compliance Status Description Type Channels Input / Output Ratio Input Level Output Level VCC Typ (V) tJitterRMS Typ (ps) tskew(o-o) Max (ps) tpd Typ (ns) tR & tF Max (ps) fmaxClock Typ (MHz) fmaxData Typ (Mbps) Package Type
 Pb-free 
 Halide free 
 Active     Clock / Data Driver, 2:1:10 Differential, 6.125 Gbps, 2.5 V / 3.3 V, with CML Output   Buffer   1   2:1:10 
 CML 
 CMOS 
 ECL 
 LVDS 
 TTL 
 CML 
 2.5 
 3.3 
 0.2   20 
 0.24 
 0.34 
 75     6000   QFN-52 
 Pb-free 
 Halide free 
 Active     Clock / Data Driver, 2:1:10 Differential, 6.125 Gbps, 2.5 V / 3.3 V, with CML Output   Buffer   1   2:1:10 
 CML 
 CMOS 
 ECL 
 LVDS 
 TTL 
 CML 
 2.5 
 3.3 
 0.2   20 
 0.24 
 0.34 
 75     6000   QFN-52 
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