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NB7L14M: Clock / Data Fanout Buffer / Translator, 2.5 V / 3.3 V, 1:4 Differential, 12 Gbps, with CML Outputs and Internal Termination

Overview
Specifications
Datasheet: 2.5V/3.3V, 10Gb/s Differential 1:4 Clock/Data Fanout Buffer/Translator with CML Outputs and Internal Termination
Rev. 6 (207.0kB)
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Product Overview
产品说明
The NB7L14M is a differential 1-to-4 clock/data distribution chip with internal source termination and CML output structure, optimized for low skew and minimal jitter. The device produces two identical output copies of clock or data operating up to 8 GHz or 12 Gb/s, respectively.

Inputs incorporate internal 50 Ohm termination resistors and accept NECL (Negative ECL), PECL (Positive ECL), CML, LVCMOS, LVTTL, or LVDS. Differential 16mA CML (Current Mode Logic) output provides matching 50 Ohm terminations, and 400 mV output swings when externally terminated, 50 Ohm to VCC.
特性
 
  • Maximum Input Clock Frequency up to 8 GHz Typical
  • Maximum Input Data Rate up to 12Gb/s Typical
  • < 0.5 ps Maximum RMS Clock Jitter
  • < 10 ps Data Dependant Jitter
  • 30 ps Typical Rise & Fall Times
  • 110 ps Typical Propagation Delay
  • 6 ps Typical Within Device Skew
  • Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V
  • CML Output Level (400 mV Peak-to-Peak Output)Differential Output Only
  • 50Ω Input and Output Termination Resistors
  • Functionally Compatible with Existing 2.5 V / 3.3V LVEL, LVEP, EP, and SG Devices
  • Pb-Free Packages are Available
应用
  • SDH/SONET OC-3 to OC-48 Data Buffering
  • High Speed Precision Edge Clocking
技术文档及设计资源
应用注释 (14) 封装图纸 (1)
仿真模型 (1) 评估板文档 (1)
数据表 (1)  
评估/开发工具信息
产品 状况 Compliance 简短说明 行动
NB7L14MMNGEVB Active
Pb-free
Differential Clock Evaluation Board
供货情况和样品
产品
状况
Compliance
具体说明
封装
MSL*
容器
预算价格 (1千个数量的单价)
类型
外形
类型
数量
NB7L14MMNG Active
Pb-free
Halide free
Clock / Data Fanout Buffer / Translator, 2.5 V / 3.3 V, 1:4 Differential, 12 Gbps, with CML Outputs and Internal Termination QFN-16 485G-01 1 Tube 123 Contact Sales Office
NB7L14MMNR2G Active
Pb-free
Halide free
Clock / Data Fanout Buffer / Translator, 2.5 V / 3.3 V, 1:4 Differential, 12 Gbps, with CML Outputs and Internal Termination QFN-16 485G-01 1 Tape and Reel 3000 Contact Sales Office
表面贴装器件的潮湿敏感度等级(MSL)(260°C回流温度时测量无铅,235°C回流温度时测量含铅)
市场订货至交货的时间(周) : 2 to 4
Avnet   (2015-07-09) : <1K
Digikey   (2015-07-09) : <1K
FutureElectronics   (2015-07-09) : <100
Mouser   (2015-07-09) : <1K
ON Semiconductor   (2015-07-08) : 4,059
市场订货至交货的时间(周) : 8 to 12
ON Semiconductor   (2015-07-08) : 6,000
Datasheet: 2.5V/3.3V, 10Gb/s Differential 1:4 Clock/Data Fanout Buffer/Translator with CML Outputs and Internal Termination
Rev. 6 (207.0kB)
»浏览可靠性数据
»查看材料成分
»产品更改通知 (5)
Product Overview

Product Compliance Status Description Type Channels Input / Output Ratio Input Level Output Level VCC Typ (V) tJitterRMS Typ (ps) tskew(o-o) Max (ps) tpd Typ (ns) tR & tF Max (ps) fmaxClock Typ (MHz) fmaxData Typ (Mbps) Package Type
 Pb-free 
 Halide free 
 Active     Clock / Data Fanout Buffer / Translator, 2.5 V / 3.3 V, 1:4 Differential, 12 Gbps, with CML Outputs and Internal Termination   Buffer   1   1:4 
 CML 
 CMOS 
 ECL 
 LVDS 
 TTL 
 CML 
 2.5 
 3.3 
 0.2   15   0.11   60   8000   12000   QFN-16 
 Pb-free 
 Halide free 
 Active     Clock / Data Fanout Buffer / Translator, 2.5 V / 3.3 V, 1:4 Differential, 12 Gbps, with CML Outputs and Internal Termination   Buffer   1   1:4 
 CML 
 CMOS 
 ECL 
 LVDS 
 TTL 
 CML 
 2.5 
 3.3 
 0.2   15   0.11   60   8000   12000   QFN-16 
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