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LVT373和LVTH373包含八个带有3态输出的闩锁,适合用于总线结构的系统应用。 当锁存使能(LE)为高电平时,锁存器对于数据而言是透明的。 当LE为低电平时,满足输入时序要求的数据被锁存。 当输出使能(OE#)为低电平时,数据显示在总线上。 当OE#为高电平时,总线输出处于高阻抗状态。 LVTH373数据输入包含总线保持功能,无需外部上拉电阻即可保持未用的输入。 这些八通道闩锁设计用于低电压(3.3V) VCC应用,也可向5V环境提供TTL接口。 LVT373和LVTH373采用先进的BiCMOS技术制造,可实现类似于5V ABT的高速运行,同时又能维持较低的CMOS功耗。
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