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SP65: 0.65 μm标准单元ASIC

概览
产品简介
安森美半导体SP65标准单元系列结合了不同标准单元、存储器及I/O选择以优化速度、占位面积及能耗性能,帮助符合客户目标。SP65还提供宽广IP选择,支持多种应用。

特性
  • 技术定义:65 nm
  • 高达1亿逻辑门及180 Mb SRAM
  • 极佳的性能:
    • 850 MHz用于18 x 18乘法器
    • 1 k x 32 DPRAM仅0.8 ns延迟
    • 内核工作电压0.9、1.0、1.1、1.2 V
    • I/O单元电压承受1.2 V、1.5 V、1.8 V、2.5 V、3.3 V及5 V
  • 能耗:1.1 nW/MHz/门 (FO=0; VDD=1.0 V)
  • 结温范围:-40° C to 125° C
  • 成本驱动型架构:
    • 高达9层金属(包括RDL)
    • 线邦定封装用于中低I/O数量的器件
    • 倒装芯片封装用于较大I/O数量的器件或高性能应用
  • 标准单元库:
    • 通用及低功耗技术
    • 多种通道尺寸
    • 不同供电电压用于不同电压岛
    • 多种Vt选择
  • I/O单元选择:
    • GPIO
    • 收发器:PCI, I2C, LVDS, SSTL, HSTL, PECL, MII, CML
    • 长、短、同轴(in-line)、交错(staggered)及区域(area) I/O
  • 支持的存储器:
    • 同步单端口、双端口、寄存器文件、ROM
    • OTP及电子熔丝
    • SRAM修复特性用于提供高良率
    • 系统存储器内BIST
    • 可选闪存及DRAM
  • 存储器接口:
    • DDR1、2和3接口
    • mDDR 接口
    • SD卡接口
    • PCMCIA
  • 通信接口:
    • PCIe一代、二代及三代
    • XAUI, SATA
    • USB1、2及3
    • MIPI M-PHY 及D-PHY
    • HDMI 1.3 及1.4
  • ARM处理器系列
    • ARM 经典系列(7,9,11),M系列,A系列,R系列
    • APB、AHB、AXI接口
    • 其它处理器
  • 模拟单元
    • 数据转换器(ADC, DAC)
    • 乘法器
    • 比较器
    • 电源管理(稳压器)
    • 时序(PLL)
  • 低功耗
    • 集成门控时钟
    • 多Vt优化
    • 电压岛
    • 降低门极泄漏功率
  • 广泛的封装能力:
    • 0.5 mm至1.27 mm间距BGA
    • CSPs, QFP, QFN, TQFP, PLCC, LCC, JLCC
    • 带闪存、DRAM的堆叠封装
    • 可按要求提供高温老化测试(Burn-in)能力
  • FPGA转换专用存储器功能:
    • 输出寄存器模式,移位寄存器模式,FIFO模式
    • 赛灵思先读后写及无变化模式
    • Altera MRAM 尺寸
  • 丰富的可测试性设计(DFT)方法:
    • 快速应用可测试性设计(DFT)
    • 系统存储器内IBIST及逻辑BIST
    • IEEE1149* 标准
    • DFM及DFQ旨用用于DFT途径
  • ESD保护能力为2,000 V HBM、500 V CDM、200 V MM
  • 闩锁能力>200 mA @ 125° C
  • 提供多层光罩(MLR)
应用

SP65针对用于小至大批量的军事及航空工业通信、网络计算消费市场的数字ASIC产品。SP65工艺的高性能能力令其非常适用于高速应用,包括高性能ARM 处理器、存储器接口、通信接口及模拟单元。SP65配以丰富的IP系列支援,适合军需品、雷达系统、航空、安全通信、无线基础设施、工业控制、打印机及信息娱乐系统等应用。安森美半导体的RTL签核(signoff)、网表交递(hand-off)及可选规格切换流程支持快速及无缝地获得SP65设计。

针对的质量标准
SP65提供的制造选择包括ITAR及DO-254支援,符合军事和航空应用的特定质量标准。

为现有产品提供第二供货源
安森美半导体的ASIC至ASIC转换能力使SP65能为现有大批量产品提供高性价比的替代供货源。

FPGA原型设计
安森美半导体基于丰富的FPGA 转换经验,能够在单个SP65器件中集成采用FPGA开发原型的ASIC设计,或那些部分开发原型的设计,或在FPGA及DDR, 串行解串器(SerDes)或USB接口等其它器件之间分割的设计。

安森美半导体也能为客户提供可采用FPGA开发原型的丰富软IP库,进一步便利客户获得成本竞争力高、能耗低的ASIC流程以生产。

FPGA转换
我们将扩展SP65产品路线图,支持0.9至1.2 V FPGA器件,包括:

  • 完整I/O
  • 存储器特性兼容性
  • DLL/PLL 赞同性
  • 支持系统IP

ASIC设计工具及方法

支持安森美半导体ASIC的领先第三方软件平台:

  • Cadence®
  • Synopsys®
  • Mentor Graphics™

安森美半导体设计流程集成了领先的第三方设计工具及安森美半导体的专有工具,为中等规模ASIC提供灵活的设计接口,为ASIC至ASIC转换提供RTL签核、ASIC网表,及为FPGA至ASIC转换提供FPGA设计。安森美半导体方法学确保提供紧凑而良好匹配的设计至生产流程。安森美半导体的专职资深工程专家能够在设计流程的任何阶段协助客户。

  

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