Translator, Triple ECL Input to LVPECL Output

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概览

The MC100LVEL90 is a triple ECL to LVPECL translator. The device receives either -3.3 V or -5 V differential ECL signals, determined by the VEE supply level, and translates them to +3.3 V differential LVPECL output signals.

To accomplish the level translation, the LVEL90 requires three power rails. The VCC supply should be connected to the positive supply, and the VEE pin should be connected to the negative power supply. The GND pins, as expected, are connected to the system ground plane. Both VEE and VCC should be bypassed to ground via 0.015F capacitors.

Under open input conditions, the Dbar input will be biased at VEE/2 and the D input will be pulled to VEE . This condition will force the Q output to a LOW, ensuring stability.

The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. BB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 5F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.

  • 500ps Propagation Delays
  • ESD Protection: >2 kV HBM, >200 V MM
  • The 100 Series Contains Temperature Compensation
  • Operating Range: VCC = 3.0 V to 3.8 V; VEE = -3.0 V to -5.5 V; GND= 0 V
  • Internal Input Pulldown Resistors
  • Q Output will Default LOW with Inputs Open or at VEE
  • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
  • Flammability Rating: UL-94 code V-0 @ 1/8", Oxygen Index 28 to 34
  • Transistor Count = 261 devices
  • Pb-Free Packages are Available

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MC100LVEL90DWG

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Active

CAD Model

Pb

A

H

P

SOIC-20W

3

260

TUBE

38

Y

3

ECL

ECL

3.3

650

0.5

500

Price N/A

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MC100LVEL90DWR2G

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Active

CAD Model

Pb

A

H

P

SOIC-20W

3

260

REEL

1000

Y

3

ECL

ECL

3.3

650

0.5

500

Price N/A

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