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MC74AC273/74ACT273 具有八个带 独立 D 输入和 Q 输出的边沿触发 D 型触发器。公用缓冲时钟 (CP) 和主 重置(MR)输入可同时加载和重置(清除)所有触发器。该寄存器为全边沿触发。每个 D 输入的状态,在从低电平至高电平时钟转换 之前的一个设置时间内被传送到相应 触发器的 Q 输出。所有输出将被 MR 输入上的低电平 电压电平强制为低电平,而不受时钟或数据输入的影响。该器件对于仅需要真实 输出且所有存储 元件都公用的时钟和主重置的应用非常有用。
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MC74AC273DTR2G
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