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PLL Clock Generators | NB3N51054
概览
NB3N51054 是一款精确、低相位干扰时钟生成器，支持 PCI Express 要求。该器件接受 25 MHz 基础模式并行谐振晶体或 25 MHz 参考时钟信号，以 100 MHz 时钟频率生成四个 HCSL/ LVDS 输出，最大歪曲率 40 ps。通过 I2C 接口，NB3N51054 提供 -0.35% 和 -0.5% 的可选择扩频选项，适用于需要低电磁干扰 (EMI) 以及无扩频选项的优化性能的应用。
- Networking
- Consumer
- Computing and Peripherals
- Industrial Equipment
- PCIe Clock Generation Gen 1, Gen 2, Gen 3 and Gen 4
- Switch and Router
- Set Top Box, LCD TV
- Servers, Desktop Computers
- Automated Test Equipment
- Spread of −0.35%, −0.5% and No Spread
- Typical Phase Jitter @ 100 MHz (integrated 12 kHz to 20 MHz): 0.5 ps
- Typical Cycle-cycle Jitter @ 100 MHz (10k cycles): 20 ps
- Uses 25 MHz Fundamental Crystal or Reference Clock Input
- Four Low Skew HCSL or LVDS Outputs
- I2C Support with Read Back Capability
- PCIe Gen 1, Gen 2, Gen 3, Gen 4 Jitter Compliant
- Operating Supply Voltage Range 3.3 V ± 5%
- Industrial Temperature Range −40°C to +85°C
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NB3N51054DTR2G
Active
Pb
A
H
P
TSSOP-24
1
260
REEL
2500
Y
CMOS
Crystal
HCSL
LVDS
3.3
25
100
20
-
0.5
-
-
-40
85
Price N/A
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