Evaluation Board | NB3N1900KMNGEVB
3.3 V 100/133 MHz Differential 1:19 HCSL Clock ZDB/Fanout Buffer for PCIe Evaluation Board
概览
The NB3N1900KMNGEVB Evaluation Boards were developed for the NB3N1900K (HCSL) devices. This evaluation board was designed to provide a flexible and convenient platform to quickly evaluate, characterize and verify the operation of the NB3N1900K devices. There are no vias on the high-speed differential I/O metal traces so as to eliminate via impedance and stub affects. Board stand-offs are installed.
特性
- Convenient and Compact Board Layout
- Incorporates On-board I2C/SMBus Interface CircuitryPowered from a USB Connection, Minimizing Cabling
- Accommodates the Electrical Characterization of theNB3N1900K (HCSL Outputs)
- 3.3 V Power Supply Device Operation
- Fixed Feedback Path for Lowest Input−to−Output Delay
- Selectable PLL Bandwidth
- Spread Spectrum Compatible: Tracks Input Clock Spreading for Low EMI
Evaluation/Development Tools
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NB3N1900KMNGEVB_GERBER
0
Eval Board: Gerber
1.2 MB
EN
Eval Board: Gerber
March 12, 2025
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EVBUM2256/D
1
Eval Board: Manual
276.48 KB
EN
Eval Board: Manual
November 01, 2019
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NB3N1900KMNGEVB_BOM_ROHS
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Eval Board: BOM
74.75 KB
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Eval Board: BOM
May 29, 2025
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NB3N1900KMNGEVB_TEST_PROCEDURE
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Eval Board: Test Procedure
204.8 KB
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Eval Board: Test Procedure
March 12, 2025
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NB3N1900KMNGEVB_SCHEMATIC
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Eval Board: Schematic
121.86 KB
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Eval Board: Schematic
March 12, 2025
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