(NETLIST)
(FOR DRAWING: C:/Users/fg6zcn/Documents/Board Designs/[ONSEC-16-004] USB-PD Load Board/Hoogstra - Thermal Relief/fab/USBPD_Load_RevD.brd)
(GENERATED BY: ALLEGRO 17.2 S008 (v17-2-50AW))
(Thu Nov 09 16:25:24 2017)
$PACKAGES
'CON_MINIUSB2-STND_B' ! '65100516121_MINI USB1/2 B_CON_M' ! 65100516121 ; ,
        J2 
JTHI_HDR1R1PS_100MIL ! '613 001 111 21_1X1 100MIL_JTHI_' ! '613 001 111 21' ,
        ; J8 J9 J10 J11 
JTHI_HDR1R2PS_100MIL ! '613 002 111 21_1X2 100MIL_JTHI_' ! '613 002 111 21' ,
        ; J5 
JTHI_HDR1R4PS_100MIL ! '613 004 111 21_1X4 100MIL_JTHI_' ! '613 004 111 21' ,
        ; J3 
JTHI_HDR1R5PS_100MIL ! '613 005 111 21_1X5 100MIL_JTHI_' ! '613 005 111 21' ,
        ; J4 J7 
SMC0603 ! '0603_SMC0603__0.1UF' ! '0.1uF' ; C9 C13 C14 C15 C16 C17 
SMC0603 ! 0603_SMC0603__1UF ! 1uF ; C2 C3 C4 C8 C10 C11 C12 
SMC0603 ! 0603_SMC0603__470PF ! 470pF ; C6 C7 
SMC0805 ! 'CAP_NP_SMC0805_1.35__2.2UF' ! '2.2uF' ; C18 
SMR0603 ! 0603_SMR0603__0 ! 0 ; R7 
SMR0603 ! '0603_SMR0603__2.2K' ! '2.2k' ; R2 R3 R10 R13 R14 R15 
SMR0603 ! '0603_SMR0603__4.7K' ! '4.7k' ; R5 R16 
SMR0603 ! 0603_SMR0603__10K ! 10k ; R18 
SMR0603 ! 0603_SMR0603__100K ! 100k ; R8 R17 
SMR0603 ! 0603_SMR0603__DNP ! DNP ; R11 R12 
'SOT89-5' ! 'NCP1450-PWM STEPUP CNTRL_2_SOT8' ! NCP4641H033T1G ; U4 
'SOT-563-6' ! 'CM1240_SOT-563-6__NUP4060' ! NUP4060 ; U3 
STHI_DIP04 ! '206-4_STHI_DIP04_S_DIP4' ! S_DIP4 ; SW2 
USMM_QFN24R4X4_0P5_EP_RWK ! 'CY7C65211-24LTXI_USMM_QFN24R4X4' ,
        ! 'CY7C65211-24LTXI' ; U2 
USMM_QFN24R4X4_0P5_EP_RWK ! 'CYPD21XX-24LQXIT_USMM_QFN24R4X4' ,
        ! 'CYPD2122-24LQXIT' ; U1 
'WEIDMULLER-171602000' ! '1716020000_2PIN SCREW_WEIDMULLE' ! 1716020000 ; ,
        J6 
WURTH_USBPD_TYPE_C ! '632723300011_USB3_1 C PD_WURTH_' ! '632 723 300 011' ,
        ; J1 
$NETS
CC1 ; C7.1 J1.A5 J7.4 U1.2 U1.3 
CC2 ; C6.1 J1.B5 J7.5 U1.1 
'D+' ; J1.A6 J1.B6 J7.2 R11.1 
'D-' ; J1.A7 J1.B7 J7.3 R12.1 
GND ; C2.2 C3.2 C4.2 C6.2 C7.2 C8.2 C9.1 C10.2 C11.2 C12.2 C13.1 C14.1 ,
        C15.1 C16.1 C17.1 C18.2 J1.A1 J1.A12 J1.B1 J1.B12 J1.G1 J1.G2 ,
        J1.SH1 J1.SH2 J1.SH3 J1.SH4 J2.5 J3.4 J4.4 J5.2 J6.1 J7.1 J8.1 J9.1 ,
        J10.1 J11.1 R8.1 R18.2 SW2.5 SW2.6 SW2.7 SW2.8 U1.EPAD U2.3 U2.13 ,
        U2.16 U2.17 U2.EPAD U3.4 U3.6 U4.2 U4.4 
GND_EARTH ; C9.2 J2.6 J2.7 J2.8 J2.9 R8.2 
GPIO2 ; C13.2 R13.2 SW2.4 U1.13 
GPIO3 ; C14.2 R14.2 SW2.3 U1.14 
GPIO4 ; C15.2 R15.2 SW2.2 U1.15 
GPIO8 ; R17.2 R18.1 U1.10 
INT ; J3.3 R10.2 U1.21 U2.19 
N13979004 ; J2.2 U2.10 U3.1 
N13979011 ; J2.3 U2.11 U3.2 
N13982640 ; C4.1 U1.7 
N13984820 ; R5.2 U2.14 
N13984928 ; C8.1 U2.12 
N14015838 ; R11.2 U1.24 
N14015876 ; R12.2 U1.23 
SCL ; J3.2 R2.2 U1.20 U2.21 
SCLK ; J4.2 U1.12 
SDA ; J3.1 R3.2 U1.19 U2.22 
SWDIO ; J4.1 U1.11 
V3P3 ; C3.1 C12.1 J4.5 R2.1 R3.1 R10.1 R13.1 R14.1 R15.1 R16.1 U1.6 U1.8 ,
        U1.9 U4.1 
V5P0 ; C10.1 C11.1 R5.1 R7.2 U2.15 U2.24 
VBUS ; C2.1 C17.2 C18.1 J1.A4 J1.A9 J1.B4 J1.B9 J5.1 J6.2 R17.1 U4.3 U4.5 
VBUS_MINI ; J2.1 R7.1 U3.3 
XRES ; C16.2 J4.3 R16.2 SW2.1 U1.16 
$NETS
$A_PROPERTIES
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):gpio8'; 'GPIO8'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):gpio4'; 'GPIO4'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):gpio3'; 'GPIO3'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):gpio2'; 'GPIO2'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):n14015876'; 'N14015876'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):n14015838'; 'N14015838'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):\d-\'; 'D-'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):\d+\'; 'D+'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):int'; 'INT'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):v3p3'; 'V3P3'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):xres'; 'XRES'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):sclk'; 'SCLK'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):swdio'; 'SWDIO'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):n13984928'; 'N13984928'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):n13984820'; 'N13984820'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):sda'; 'SDA'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):scl'; 'SCL'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):n13982640'; 'N13982640'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):vbus'; 'VBUS'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):v5p0'; 'V5P0'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):cc2'; 'CC2'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):cc1'; 'CC1'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):n13979011'; 'N13979011'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):vbus_mini'; 'VBUS_MINI'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):gnd_earth'; 'GND_EARTH'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):n13979004'; 'N13979004'
LOGICAL_PATH '@usbpd_load_revb.design(sch_1):gnd'; 'GND'
$PINS
$A_PROPERTIES
DYN_THERMAL_CON_TYPE 'L2:ORTHOGONAL;L3:ORTHOGONAL'; J1.SH4 J1.SH3 J1.SH2 J1.SH1
$END
