Small Signal MOSFETs | NDS332P

P 沟道逻辑电平增强型场效应晶体管，-20V，-1A，0.41Ω

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概览

此类 P 沟道逻辑电平增强型电场效应晶体管是使用 Fairchild 的高单元密度 DMOS 专属技术生产的。这种极高密度工艺特别适用于最大程度降低导通电阻。此类器件特别适用于笔记本电脑电源管理、便携式电子设备和其他电池供电电路等低压应用，在此类应用中需要在非常小形的表面贴装封装中实现快速高压侧开关和线路内低功率损耗。

  • This product is general usage and suitable for many different applications

  • -1 A, -20 V, RDS(ON) = 0.41Ω @ VGS= -2.7 V, RDS(ON) = 0.3 Ω @ VGS = -4.5 V.
  • 栅极驱动电平要求极低，从而可在3V电路中直接运行。 VGS(th) < 1.0V。
  • 专有封装设计使用铜引线框架，可提供出色的热和电气能力。
  • 高密度单元设计，可实现极低的RDS(ON)。
  • 出色的导通阻抗和最大的DC电流能力。
  • 紧凑型工业标准SOT-23表面贴装封装。

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Gate Level

Wide SOA Mosfets

Configuration

OPN in older Technology

V(BR)DSS Min (V)

RDS(on) Max @ VGS = 10 V (mΩ)

VGS Max (V)

Vgs(th) Max (V)

Id Max (A)

PD Max (W)

RDS(on) Max @ VGS = 2.5 V (mΩ)

RDS(on) Max @ VGS = 4.5 V (mΩ)

Qg Typ @ VGS = 4.5 V (nC)

Qg Typ @ VGS = 10 V (nC)

Ciss Typ (pF)

Qgd Typ @ VGS = 4.5 V (nC)

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NDS332P

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CAD Model

Pb

A

H

P

SOT-23-3

527AG

1

260

REEL

3000

N

P-Channel

PowerTrench® T1

SOT-23

Small Signal

Logic

0

NA

0

-20

-

8

-1

-1

0.5

410

300

2

3.7

195

-

-

-

-

$0.1393

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可靠性数据

Die Related Summary Data

Device: NDS332P

Equivalent to wafer fab process: TP

产品技术

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等效器件小时

平均故障间隔时间/平均无故障时间（按小时计算）

FITS

TP

8

738717284

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Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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