DDR Termination Regulators | NCP51403
概览
NCP51403 是一款源/汲双数据速率 (DDR) 端接稳压器，特别适用于务必考虑空间的低输出电压和低噪声系统。NCP51403 保持了快速的瞬变响应，仅需最低 20 uF 的输出电容。NCP51403 支持远程感应功能和 DDR VTT 总线端接的所有功率要求。NCP51403 还可用于需要动态可调输出电压的低功率芯片集和图形处理器芯。
- DDR Memory Termination
- Servers and Networking equipment
- Graphics Processor Core Supplies
- Chipset/RAM Supplies as Low as 0.5 V
- Set Top Boxes, LCD−TV/PDP−TV, Copier/Printers
- Desktop PC’s, Notebooks, and Workstations
- Input Voltage Rails: Supports 2.5 V, 3.3 V and 5 V Rails
- PVCC Voltage Range: 1.1 to 3.5 V
- Integrated Power MOSFETs
- Fast Load−Transient Response
- PGOOD − Logic output pin to Monitor VTT Regulation
- VRI − Reference Input Allows for Flexible Input Tracking Either Directly or Through Resistor Divider
- EN − Logic input pin for Shutdown mode
- Built−in Under Voltage Lockout and Over Current Limit
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