D Flip-Flops and JK Flip-Flops | 74VCX16374
Low-Voltage 1.8/2.5/3.3 V 16-Bit D-Type Flip-Flop
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概览
The 74VCX16374 is an advanced performance, non-inverting 16-bit D-type flip-flop. It is designed for very high-speed, very low-power operation in 1.8V, 2.5V or 3.3V systems. The VCX16374 is byte controlled, with each byte functioning identically, but independently. Each byte has separate Output Enable and Clock Pulse inputs. These control pins can be tied together for full 16-bit operation.
When operating at 2.5V (or 1.8V) the part is designed to tolerate voltages it may encounter on either inputs or outputs when interfacing to 3.3V busses. It is guaranteed to be over-voltage tolerant to 3.6V.
The 74VCX16374 consists of 16 edge-triggered flip-flops with individual D-type inputs and 3.6V-tolerant 3-state outputs. The clocks (CPn) and Output Enables (OEn)bar are common to all flip-flops within the respective byte. The flip-flops will store the state of individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. With the OEbar LOW, the contents of the flip-flops are available at the outputs. When the OEbar is HIGH, the outputs go to the high impedance state. The OEbar input level does not affect the operation of the flip-flops.
- Designed for Low Voltage Operation: VCC = 1.65-3.6V
- 3.6V Tolerant Inputs and Outputs
- High Speed Operation: 3.0ns max for 3.0 to 3.6V
3.9ns max for 2.3 to 2.7V
7.8ns max for 1.65 to 1.95V - Static Drive: +/-24mA Drive at 3.0V+/-18mA Drive at 2.3V+/-6mA Drive at 1.65V
- Supports Live Insertion and Withdrawal
- IOFF Specification Guarantees High Impedance When VCC = 0V
- Near Zero Static Supply Current in All Three Logic States (20mA)
Substantially Reduces System Power Requirements - Latchup Performance Exceeds +/-250mA @ 125°C
- ESD Performance: Human Body Model >2000V; Machine Model >200V
- All Devices in Package TSSOP are Inherently Pb-Free
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