Arithmetic Functions | MC100EP139

3.3 V / 5.0 V ECL ÷·2/4，÷·4/5/6 时钟生成器芯片

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MC10/100EP139 是一款低歪曲率 2/4 分频、4/5/6 分频时钟生成芯片进行分频，明确适用于低歪曲率时钟生成应用。内部分频器互相同步，因此公共输出边全部精确对齐。该器件可由差分或单端 ECL 驱动，如果使用正向电源，则由 LVPECL 输入信号驱动。另外，通过使用 VBB 输出，可以将正弦源以交流方式耦合到该器件中。如果要使用单端信号，则应该将 VBB 引脚联接 CLKbar 输入，并通过 0.01 uF 电容器旁通接地。公共启用 (ENbar) 是同步的，因此内部分频器仅在内部时钟已在低电平状态时启用/禁用。这样会避免当设备启用/禁用时在内部时钟上产生短时钟脉冲，这种情况可能发生在异步控制中。内部启用触发器在输入时钟的下降边进行计时，因此，所有相关规格限制都参考到时钟输入的负边。启动时，内部触发器将达到随机状态；因此，对于使用多个 EP139 的系统来说，必须断定主时钟重置 (MR) 输入以确保同步。对于仅使用一个 EP139 的系统，不需要作为内部分频器设计运行的 MR 引脚将确保一个器件 2/4 输出分频和 4/5/6 个输出分频之间的同步。所有 VCC 和 VEE 引脚必须外部联接电源才能保证正确运行。100 系列包含温度补偿。

  • Low-Clock Skew Generation
  • Maximum Frequency >1.0 GHz Typical
  • 50ps Output-to-Output Skew
  • PECL Mode Operating Range: VCC=3.0 V to 5.5 V with VEE = 0 V
  • NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V
  • Open Input Default State
  • Safety Clamp on Inputs
  • Synchronous Enable/Disable
  • Master Reset for Synchronization of Multiple Chips
  • VBB Output
  • Pb-Free Packages are Available

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MC100EP139DTG

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Active

CAD Model

Pb

A

H

P

TSSOP-20

9.48

1

260

TUBE

75

Y

Divider

ECL

ECL

5

1000

0.75

250

Price N/A

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MC100EP139DTR2G

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Active

CAD Model

Pb

A

H

P

TSSOP-20

9.48

1

260

REEL

2500

Y

Divider

ECL

ECL

5

1000

0.75

250

Price N/A

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MC100EP139DWG

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CAD Model

Pb

A

H

P

SOIC-20W

751D-05

3

260

TUBE

38

Y

Divider

ECL

ECL

5

1000

0.75

250

Price N/A

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