Clock / Data Fanout Buffer, 1:2 Differential, ECL, 2.5 V / 3.3 V

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概览

The MC10LVEP11 is a differential 1:2 fanout buffer. The device is pin and functionally equivalent to the EP11 device. With AC performance the same as the EP11 device, the LVEP11 is ideal for applications requiring lower voltage. Single ended CLK input operation is limited to a VCC >= 3.0 V in PECL mode, or VEE <= -3.0 V in NECL mode.

The 100 Series contains temperature compensation.

  • GbE or Fibre Channel Redundant Fan-out

  • 240 ps Typical Propagation Delay
  • Maximum Frequency > 3 GHz Typical
  • PECL Mode Operating Range: VCC= 2.375 V to 3.8 V with VEE= 0 V
  • NECL Mode Operating Range: VCC= 0 V with VEE= -2.375 V to -3.8 V
  • Open Input Default State
  • Q Outputs will default LOW with inputs open or at VEE
  • LVDS Input Compatible

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Package Type

Case Outline

MSL Type

MSL Temp (°C)

Container Type

Container Qty.

ON Target

Type

Channels

Input / Output Ratio

Input Level

Output Level

VCC Typ (V)

tJitterRMS Typ (ps)

tskew(o-o) Max (ps)

tpd Typ (ns)

tR & tF Max (ps)

fmaxClock Typ (MHz)

fmaxData Typ (Mbps)

Reference Price

MC10LVEP11DR2G

Active

CAD Model

Pb

A

H

P

SOIC-8

1

260

REEL

2500

Y

Buffer

1

1:2

CML

ECL

LVDS

ECL

3.3

1.42

20

0.24

170

3000

-

Price N/A

More Details

MC10LVEP11DTG

Active

CAD Model

Pb

A

H

P

TSSOP-8

3

260

TUBE

100

Y

Buffer

1

1:2

CML

ECL

LVDS

ECL

3.3

1.42

20

0.24

170

3000

-

Price N/A

More Details

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