2:1:5 LVCMOS 扇出缓冲器,3.3V / 2.5V / 1.8V / 1.5V

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概览

NB3F8L3005C 是一款 2:1:5 时钟/数据扇出缓冲器,在一个 3.3 V / 2.5 V 核心 VDD 和两个 3.3 V / 2.5 V / 1.8 V / 1.5 V VDDOx 灵活电源(小于等于 VDD)的支持下运行。必须在一个晶体输入或一个差分/SE 时钟/ 数据输入之间选择一个 Mux。差分输入接受 LVPECL、LVDS、HCSL 或 SSTL 及单端电平。根据表 3,MUX 控制线 SEL 会选择 CLK/CLK 或晶体输入引脚。选择时钟输入时,晶体输入被禁用。根据表 4,如输出启用引脚 OE 为低电平,则同步强行变为高阻抗状态 (Hi−Z)。输出包括 5 个单端 LVCMOS 输出。

  • Clock Distribution
  • Networking and Communications
  • High End Computing
  • Wireless and Wired Infrastructure

  • Switch/Routers
  • Servers
  • Test and Measurement
  • Automated Test Equipment

  • Five LVCMOS / LVTTL Outputs up to 200 MHz
  • Differential Inputs Accept LVPECL, LVDS, HCSL, SSTL, orLVCMOS/LVTTL
  • Crystal Interface
  • Crystal Input Frequency Range: 10 MHz to 50 MHz
  • Output Skew: 10 ps Typical
  • Additive RMS Phase Jitter @ 156.25 MHz, (12 kHz – 20 MHz):0.03 ps (Typical)
  • Synchronous Output Enable
  • Output Defined Level When Input is Floating
  • Multiple Power Supply Modes Available (See Datasheet)
  • Two Separate Output Bank Power Supplies
  • Industrial Temperature Range: −40°C to 85°C

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CAD Models

Compliance

Package Type

Case Outline

MSL Type

MSL Temp (°C)

Container Type

Container Qty.

ON Target

Type

Channels

Input / Output Ratio

Input Level

Output Level

VCC Typ (V)

tJitterRMS Typ (ps)

tskew(o-o) Max (ps)

tpd Typ (ns)

tR & tF Max (ps)

fmaxClock Typ (MHz)

fmaxData Typ (Mbps)

Reference Price

NB3F8L3005CMNTBG

Active

CAD Model

Pb

A

H

P

QFN-24

1

260

REEL

1000

Y

Buffer

1

2:1:5

Crystal

HCSL

LVCMOS

LVDS

LVPECL

LVTTL

SSTL

LVCMOS

LVTTL

3.3

0.03

25

~NA~

600

200

~NA~

Price N/A

More Details

NB3F8L3005CMNTXG

Active

CAD Model

Pb

A

H

P

QFN-24

1

260

REEL

3000

Y

Buffer

1

2:1:5

Crystal

HCSL

LVCMOS

LVDS

LVPECL

LVTTL

SSTL

LVCMOS

LVTTL

3.3

0.03

25

~NA~

600

200

~NA~

Price N/A

More Details

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