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The NB7V52M is a 10GHz differential Data and Clock D flip-flop with a Differential asynchronous Reset. The differential D/Db, CLK/CLKb and R/Rb inputs incorporate internal 50-ohm termination resistors and will accept LVPECL, CML, LVDS logic levels. When Clock transitions from Low to High, Data will be transferred to the differential CML outputs. The differential Clock inputs allow the NB7V52M to also be used as a negative edge triggered device. The 16mA differential CML outputs provide matching internal 50-ohm terminations and produce 400 mV output swings when externally terminated with a 50-ohm resistor to VCC. The NB7V52M is offered in a low profile 3mm x 3mm 16-pin QFN package.
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Type
Bits
Input Level
Output Level
VCC Typ (V)
tJitter Typ (ps)
tpd Typ (ns)
tsu Min (ns)
th Min (ns)
trec Typ (ns)
tR & tF Max (ps)
fToggle Typ (MHz)
Reference Price
NB7V52MMNG
Active
Pb
A
H
P
QFN-16
1
260
TUBE
123
Y
D-Type
1
CML
ECL
LVDS
CML
2.5
0.2
0.2
0.04
0.05
0.2
50
12000
Price N/A
More Details
NB7V52MMNHTBG
Active
Pb
A
H
P
QFN-16
1
260
REEL
100
Y
D-Type
1
CML
ECL
LVDS
CML
2.5
0.2
0.2
0.04
0.05
0.2
50
12000
Price N/A
More Details
NB7V52MMNTXG
Active
Pb
A
H
P
QFN-16
1
260
REEL
3000
Y
D-Type
1
CML
ECL
LVDS
CML
2.5
0.2
0.2
0.04
0.05
0.2
50
12000
Price N/A
More Details
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可靠性数据
Die Related Summary Data
Device: NB7V52MMNG
Equivalent to wafer fab process: CMOS SUB
产品技术
产品技术
等效器件小时
平均故障间隔时间/平均无故障时间(按小时计算)
FITS
CMOS SUB
2
920154574
More Details
Re-calculate Data
Data is based on the following assumptions.
Note: The temperature and confidence level may be adjusted to your requirements.
Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)