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FIN1217和FIN1215可将21位宽并行LVTTL(低压TTL)数据转换为三个串行LVDS(低压差分信号)数据流。 锁相传输时钟与数据流一起通过LVDS链路并行传输。 在每个传输时钟周期内,采样并传输21位输入LVTTL数据。FIN1218和FIN1216接收这三个串行LVDS数据流并转换回21位LVTTL数据。 表1为所提供的串并/并串转换器的摘要表。 对于FIN1217,在85MHz的传输时钟频率时,每个LVDS通道上以595Mbps的速率传输21位LVTTL数据。这些芯片组解决了与宽型高速TTL接口相关的EMI和线缆尺寸问题。
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CAD Models
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MSL Type
MSL Temp (°C)
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Container Qty.
ON Target
Type
Bits
Input Level
Output Level
VCC Typ (V)
fdr Typ (Gb/sec)
tpd Typ (ns)
tsu Min (ns)
th Min (ns)
tJitter Typ (ps)
tR & tF Max (ps)
Reference Price
FIN1216MTDX
Active
Pb
A
H
P
TSSOP-48
2
260
REEL
1000
N
Serial/Parallel
-
LVDS
LVTTL
3.3
-
-
-
-
-
-
$1.353
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可靠性数据
Die Related Summary Data
Device: FIN1216MTDX
Equivalent to wafer fab process: CG
产品技术
产品技术
等效器件小时
平均故障间隔时间/平均无故障时间(按小时计算)
FITS
CG
0
99833748
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Re-calculate Data
Data is based on the following assumptions.
Note: The temperature and confidence level may be adjusted to your requirements.
Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)