PLL Clock Generators | NB3N51032

时钟生成器，3.3 V，晶体 - 25 MHz，100 MHz，125 MHz 和 200 MHz，双 HCSL/LVDS

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NB3N51032 是一款精确、低相位干扰时钟生成器，支持 PCI Express 和以太网要求。该器件接受 25 MHz 基础模式并行谐振晶体，以 25 MHz、100MHz、125 MHz 或 200 MHz 时钟频率生成差分 HCSL 输出。输出可通过恰当的端接与 LVDS 进行接口。NB3N51032 提供 - 0.5% 和 - 0.75% 的可选择扩频选项，适用于需要低电磁干扰 (EMI) 的应用。还提供无扩频设置。

  • Networking
  • Consumer
  • Computing and Peripherals
  • Industrial Equipment
  • PCIe Clock Generation Gen 1, Gen 2, Gen 3 and Gen 4
  • Gigabit Ethernet
  • FB DIMM

  • Switch and Router
  • Set Top Box, LCD TV
  • Servers, Desktop Computers
  • Automated Test Equipment

  • Spread of - 0.5%, - 0.75% and No Spread
  • Typical Period Jitter RMS of 1.5 ps
  • Uses 25 MHz Fundamental Mode Parallel Resonant Crystal
  • External Loop Filter is Not Required
  • HCSL Differential Output or LVDS with Proper Termination
  • Four Selectable Multipliers of the Input Frequency
  • Output Enable with Tri- State Outputs
  • PCIe Gen1, Gen2, Gen3, Gen4 Jitter Compliant

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Input Level

Output Level

VS Typ (V)

fin Typ (MHz)

fout Typ (MHz)

tJitter(Cy-Cy) Typ (ps)

tJitter(Period) Typ (ps)

tJitter(Φ) Typ (ps)

tR & tF Typ (ps)

tR & tF Max (ps)

TA Min (°C)

TA Max (°C)

Reference Price

NB3N51032DTR2G

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CAD Model

Pb

A

H

P

TSSOP-16

948F-01

1

260

REEL

2500

Y

Crystal

LVDS

3.3

25

25

20

1.5

0.4

-

700

-40

85

Price N/A

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可靠性数据

Die Related Summary Data

Device: NB3N51032DTR2G

Equivalent to wafer fab process: ONC18

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等效器件小时

平均故障间隔时间/平均无故障时间（按小时计算）

FITS

ONC18

2

6465777234

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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