LVX161284 包含八个双向数据缓冲器和是一个控制/状态缓冲器，可实施完全 IEEE 1284 合规接口。该器件支持 IEEE 1284 标准，适用于扩展能力端口 (ECP) 模式。引脚输出可轻松实现从外围设备（A 侧）到主机（线缆侧）的联接。线缆侧上的输出可配置为开极-漏极或高驱动 (± 14 mA)，联接至单独的电源引脚（VCC 线缆），允许这些输出由高于 A 侧的电源电压驱动。线缆侧这些输出的上拉和下拉串联端接电阻针对驱动外部线缆而优化。另外，线缆侧的所有输入（HLH 除外）和输出均包含与 VCC 线缆电源联接的内部上拉电阻，可为开极-漏极模式提供恰当的端接和上拉。外围设备侧的输出为标准低驱动 CMOS 输出，适用于接口 3V 逻辑。DIR 输入控制 A1-A8/B1-B8 收发器引脚上的数据流动。
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