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LVX273 具有八个边触发 D 型触发器,带单独的 D 输入和 Q 输出。公共缓冲时钟 (CP) 和主重置 (MR#) 输入负载和重置(清除)全部同时触发。寄存器完全为边触发。低-高时钟转换之前每个 D 输入的状态、一个设置时间传输到相应触发器的 Q 输出。所有输出由 MR# 上的低电压等级强制到低电平,而无论时钟或数据输入如何。该器件适用于仅需真正输出且时钟和主重置共用于所有存储元件的应用。输入耐压达 7V,支持 5V 系统到 3V 系统的接口。
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74LVX273M
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74LVX273MTC
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74LVX273MTCX
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