D Flip-Flops and JK Flip-Flops | 74LVX74

低压双 D 型上升沿触发的触发器

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概览

LVX74 是一款带异步“清除”和“设置”输入，以及互补 (Q, Q#) 输出的双 D 型触发器。输入的信息被传送至时钟脉冲上升沿的输出。超过“时钟脉冲”输入阈值电压后，“数据”输入被锁定，在“时钟脉冲”输入的下一个上升沿之前，现有的信息无法传送至输出。异步输入：S#D（设置）的低电平输入会将 Q 设置为高电平，C#D （清除）的低电平输入会将 Q 设置为低电平 清除和设置与时钟无关，C#D 和 S#D 上的同时低电平会使得 Q 和 Q# 都为高电平

  • This product is general usage and suitable for many different applications.

  • 输入电平从5V转换为3V
  • 非常适合低功率/低噪声3.3V应用
  • 保证同步开关噪声电平和动态阈值性能

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Case Outline

MSL Type

MSL Temp (°C)

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VCC Min (V)

VCC Max (V)

tpd Max (ns)

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Reference Price

74LVX74M

Contact Sales

Obsolete

CAD Model

Pb

A

H

P

SOIC-14

751EF

1

260

TUBE

1100

N

Dual D-type positive edge-triggered

2

2

3.6

14.1

4

Price N/A

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74LVX74MTC

Contact Sales

Obsolete

CAD Model

Pb

A

H

P

TSSOP-14 WB

948G

1

260

TUBE

2350

N

Dual D-type positive edge-triggered

2

2

3.6

8.2

4

Price N/A

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74LVX74MTCX

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Active

CAD Model

Pb

A

H

P

TSSOP-14 WB

948G

1

260

REEL

2500

N

Dual D-type positive edge-triggered

2

2

3.6

8.2

4

$0.1879

More Details

74LVX74MX

Contact Sales

Obsolete

CAD Model

Pb

A

H

P

SOIC-14

751EF

1

260

REEL

2500

N

Dual D-type positive edge-triggered

2

2

3.6

8.2

4

Price N/A

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可靠性数据

Die Related Summary Data

Device: 74LVX74M

Equivalent to wafer fab process: CMOS STD

产品技术

产品技术

等效器件小时

平均故障间隔时间/平均无故障时间（按小时计算）

FITS

CMOS STD

3

3597164517

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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