D Flip-Flops and JK Flip-Flops | MC74AC377

八路 D 型触发器，带时钟启用

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MC74AC377/74ACT377 具有八个边触发 D 型触发器， 带单独的 D 输入和 Q 输出。公共缓冲时钟 (CP) 输入将在时钟启用 (CE) 为低电平时同时加载所有 触发器。寄存器完全为边触发。低-高时钟转换之前每个 D 输入的状态、 一个设置时间传输到相应触发器的 Q 输出。CE 输入必须在低电平-高电平时钟转换之前稳定一个设置时段， 才能实现可预测运行。

  • Ideal for Addressable Register Applications
  • Clock Enable for Address and Data Synchronization Applications
  • Eight Edge-Triggered D Flip-Flops
  • Buffered Common Clock
  • Outputs Source/Sink 24 mA
  • See MC74AC273 for Master Reset Version
  • See MC74AC373 for Transparent Latch Version
  • See MC74AC374 for 3-State Version
  • ACT377 Has TTL Compatible Inputs
  • Pb-Free Packages are Available

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MC74AC377DTG

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Active

CAD Model

Pb

A

H

P

TSSOP-20

9.48

1

260

TUBE

75

N

D-Type

8

2

6

10

24

$0.2696

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MC74AC377DTR2G

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Active

CAD Model

Pb

A

H

P

TSSOP-20

9.48

1

260

REEL

2500

N

D-Type

8

2

6

10

24

$0.2696

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MC74AC377DWG

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Obsolete

CAD Model

Pb

A

H

P

SOIC-20W

751D-05

3

260

TUBE

38

N

D-Type

8

2

6

10

24

Price N/A

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MC74AC377DWR2G

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Active

CAD Model

Pb

A

H

P

SOIC-20W

751D-05

3

260

REEL

1000

N

D-Type

8

2

6

10

24

$0.3493

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可靠性数据

Die Related Summary Data

Device: MC74AC377DTG

Equivalent to wafer fab process: CMOS SUB

产品技术

产品技术

等效器件小时

平均故障间隔时间/平均无故障时间（按小时计算）

FITS

CMOS SUB

2

920154574

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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