D Flip-Flops and JK Flip-Flops | NL17SZ175

D-Type Flip-Flop with Asynchronous Clear

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概览

NL17SZ175 is a single positive edge-triggered D-type CMOS Flip-Flop with Asynchronous Clear in tiny footprint packages.

  • This product is general usage and suitable for many different applications.

  • Tiny Footprint Packages
  • Broad VCC Operating Range: 1.65V to 5.5V
  • Ultra High-Speed

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MSL Type

MSL Temp (°C)

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VCC Min (V)

VCC Max (V)

tpd Max (ns)

IO Max (mA)

Reference Price

NL17SZ175DBVT1G

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CAD Model

Pb

A

H

P

SC-74

318F-05

1

260

REEL

3000

N

D-Type

1

1.65

5.5

2.6

32

$0.0364

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可靠性数据

Die Related Summary Data

Device: NL17SZ175DBVT1G

Equivalent to wafer fab process: ONC18

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等效器件小时

平均故障间隔时间/平均无故障时间（按小时计算）

FITS

ONC18

2

6465777234

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Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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