Logic Gates | MC74HC03A

四 2 输入 NAND 门极，带开漏输出

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高性能硅门极 CMOS MC74HC03A 与 LS03 的引脚输出相同。该器件输入兼容标准的 CMOS 输出；带有上拉电阻器，可兼容 LSTTL 输出。HC03A NAND 门极具有高性能 MOS N 沟道晶体管作为输出。因此，此 NAND 门极使用恰当的上拉电阻可用于有线 AND 应用。该器件的输出特性曲线如此数据表中所示，可用作 LED 驱动器，或仅需汲电流的任何其他应用。

  • Output Drive Capability: 10 LSTTL Loads With Suitable Pullup Resistor
  • Outputs Directly Interface to CMOS, NMOS and TTL
  • High Noise Immunity Characteristic of CMOS Devices
  • Operating Voltage Range: 2 to 6V
  • Low Input Current: 1mA
  • In Compliance With the JEDEC Standard No. 7A Requirements
  • Chip Complexity: 28 FETs or 7 Equivalent Gates
  • Pb-Free Packages are Available*

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MC74HC03ADG

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Pb

A

H

P

SOIC-14

751A-03

1

260

TUBE

55

N

NAND

4

2

6

null

null

$0.1673

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MC74HC03ADR2G

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Pb

A

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SOIC-14

751A-03

1

260

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2500

N

NAND

4

2

6

null

null

$0.1155

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MC74HC03ADTR2G

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Pb

A

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TSSOP-14 WB

948G

1

260

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2500

N

NAND

4

2

6

null

null

$0.1224

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NLV74HC03ADG

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Pb

A

H

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SOIC-14

751A-03

1

260

TUBE

1

N

NAND

4

2

6

24

null

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NLV74HC03ADR2G

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CAD Model

Pb

A

H

P

SOIC-14

751A-03

1

260

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2500

N

NAND

4

2

6

24

null

Price N/A

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NLV74HC03ADTR2G

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Pb

A

H

P

TSSOP-14 WB

948G

1

260

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2500

N

NAND

4

2

6

24

null

Price N/A

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可靠性数据

Die Related Summary Data

Device: MC74HC03ADG

Equivalent to wafer fab process: CMOS SUB

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等效器件小时

平均故障间隔时间/平均无故障时间（按小时计算）

FITS

CMOS SUB

2

920154574

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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