Logic Gates | MC74HCT132A

四路 2 输入 NAND 门极，带施密特触发器输入，可兼容 LSTTL 输入

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MC74HCT132A 与 LS132 的引脚输出相同。该器件输入与标准 CMOS 输出兼容；带有上拉电阻，它们与 LSTTL 输出兼容。MC74HCT132A 可用于增强抗扰性或对慢慢变化的波形进行方形整形。

  • Industrial

  • Output Drive Capability: 10 LSTTL Loads
  • Outputs Directly Interface to CMOS, NMOS, and TTL
  • Operating Voltage Range: 2.0 to 6.0 V
  • Low Input Current: 1.0 µA
  • High Noise Immunity Characteristic of CMOS Devices
  • In Compliance with the Requirements as Defined by JEDEC Standard No. 7A
  • Chip Complexity: 72 FETs or 18 Equivalent Gates
  • These are PbFree Devices

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MC74HCT132ADG

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Obsolete

CAD Model

Pb

A

H

P

SOIC-14

751A-03

1

260

TUBE

55

N

NAND

4

2

6

null

null

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MC74HCT132ADR2G

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Pb

A

H

P

SOIC-14

751A-03

1

260

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2500

N

NAND

4

2

6

null

null

$0.128

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MC74HCT132ADTG

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Pb

A

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P

TSSOP-14 WB

948G

1

260

TUBE

96

N

NAND

4

2

6

null

null

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MC74HCT132ADTR2G

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Pb

A

H

P

TSSOP-14 WB

948G

1

260

REEL

2500

N

NAND

4

2

6

null

null

$0.1305

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NLV74HCT132ADR2G

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Pb

A

H

P

SOIC-14

751A-03

1

260

REEL

2500

N

NAND

4

2

6

null

null

Price N/A

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NLVHCT132ADTR2G

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CAD Model

Pb

A

H

P

TSSOP-14 WB

948G

1

260

REEL

2500

N

NAND

4

2

6

null

null

Price N/A

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可靠性数据

Die Related Summary Data

Device: MC74HCT132ADG

Equivalent to wafer fab process: CMOS SUB

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等效器件小时

平均故障间隔时间/平均无故障时间（按小时计算）

FITS

CMOS SUB

2

920154574

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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