Logic Gates | MC74VHC132

四 2 输入 NAND 门极，带施密特触发器输入

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MC74VHC132 是一种先进的高速 CMOS 施密特 NAND 触发器，采用硅门极 CMOS 工艺制造。它能实现与同等双极肖特基 TTL 相似的高速运行，同时还能保持 CMOS 低功耗。引脚配置和功能与 MC74VHC00 相同，只是输入存在磁滞，并具有施密特触发器功能，因此 VHC132 可用作线路接收器，接收缓慢的输入信号。该内部电路由三级组成，包括一个提供高抗扰性和稳定输出的缓冲输出。输入耐压达 7V，支持 5V 系统到 3V 系统的接口。

  • High Speed: tPD = 4.9ns (Typ) at VCC = 5V
  • Low Power Dissipation: ICC = 2µA (Max) at TA = 25 C
  • High Noise Immunity: VNIH = VNIL = 28% VCC
  • Power Down Protection Provided on Inputs
  • Balanced Propagation Delays
  • Designed for 2V to 5.5V Operating Range
  • Low Noise: VOLP = 0.8V (Max)
  • Pin and Function Compatible with Other Standard Logic Families
  • Latchup Performance Exceeds 300mA
  • ESD Performance: HBM > 2000V; Machine Model > 200V
  • Chip Complexity: 72 FETs or 18 Equivalent Gates
  • Pb-Free Packages are Available

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MC74VHC132DG

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Pb

A

H

P

SOIC-14

751A-03

1

260

TUBE

55

N

NAND

4

2

5.5

9.7

8

$0.2307

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MC74VHC132DR2G

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CAD Model

Pb

A

H

P

SOIC-14

751A-03

1

260

REEL

2500

N

NAND

4

2

5.5

9.7

8

$0.1491

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MC74VHC132DTR2G

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Pb

A

H

P

TSSOP-14 WB

948G

1

260

REEL

2500

N

NAND

4

2

5.5

9.7

8

$0.1557

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可靠性数据

Die Related Summary Data

Device: MC74VHC132DG

Equivalent to wafer fab process: CMOS SUB

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等效器件小时

平均故障间隔时间/平均无故障时间（按小时计算）

FITS

CMOS SUB

2

920154574

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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