Multiplexers | MC14555B

双二进制 1/4 解码器/信号分离器

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概览

MC14555B 和 MC14556B 采用互补 MOS (CMOS) 增强模型器件构建。每个解码器/信号分离器都具有两个选择输入（A 和 B）、一个有效低电平启用输入 (E) 和四个互斥输出（Q0、Q1、Q2、Q3）。MC14555B 让选定输出进入“高电平”状态，而 MC14556B 让选定输出进入“低电平”状态。通过使用其他 MC14555B 或 MC14556B 器件可以实现扩展解码，例如二进制到十六进制 (1/16)。应用包括数字数据传输系统中的代码转换、地址解码、内存选择控制和信号分离（使用启用输入作为数据输入）。

  • Diode Protection on All Inputs
  • Active High or Active Low Outputs
  • Expandable
  • Supply Voltage Range = 3.0 Vdc to 18 Vdc
  • All Outputs Buffered
  • Capable of Driving Two Low-Power TTL Loads or One Low-Power Schottky TTL Load Over the Rated Temperature Range
  • Pb-Free Packages are Available

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tpd Max (ns)

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MC14555BDG

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CAD Model

Pb

A

H

P

SOIC-16

751B-05

1

260

TUBE

48

N

2

3

18

190

2.25

$0.2287

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MC14555BDR2G

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CAD Model

Pb

A

H

P

SOIC-16

751B-05

1

260

REEL

2500

N

2

3

18

190

2.25

$0.2287

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NLV14555BDR2G

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Active

CAD Model

Pb

A

H

P

SOIC-16

751B-05

1

260

REEL

2500

N

2

3

18

190

null

$0.3192

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可靠性数据

Die Related Summary Data

Device: MC14555BDG

Equivalent to wafer fab process: CMOS STD

产品技术

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等效器件小时

平均故障间隔时间/平均无故障时间（按小时计算）

FITS

CMOS STD

3

3597164517

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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