// Generated for: spectre
// Generated on: Sep 12 18:14:31 2019
// Design library name: adamw
// Design cell name: tb_SPICE_model
// Design view name: schematic
simulator lang=spectre
global 0
//
//
// Library name: adamw
// Cell name: SPICE_model
// View name: schematic
subckt SPICE_model pin1 pin10 pin2 pin3 pin4 pin5 pin6 pin7 pin8 pin9
    E7 (gnd net045 en net057) vcvs gain=1000000 type=vcvs min=0 max=100
    E6 (net022 gnd flag_op net042) vcvs gain=-1000000 type=vcvs min=300 \
        max=1G
    E5 (net046 gnd ilim_op net015) vcvs gain=1000000 type=vcvs min=0 \
        max=10
    E4 (net041 gnd en net039) vcvs gain=-1000000 type=vcvs min=0 max=10
    E3 (ovp_ref gnd vc_sel net033) vcvs gain=1000000 type=vcvs min=6.1 \
        max=6.9
    E2 (ovp_op gnd vout ovp_ref) vcvs gain=10000000 type=vcvs min=0 \
        max=1000000
    E1 (ilim_op gnd ilim net023) vcvs gain=1000000 type=vcvs min=0 \
        max=10000
    E0 (en_op gnd en net035) vcvs gain=-10000000 type=vcvs min=0.038 \
        max=10G
    R15 (vin net060) resistor r=0.9MEG
    R14 (net045 vin) resistor r=460k
    R12 (vout gnd) resistor r=1M
    R11 (net043 vc_sel) resistor r=200k
    R10 (net044 en) resistor r=200k
    R9 (vin net052) resistor r=1
    R8 (flag_op net046) resistor r=1M
    R7 (net041 flag_op) resistor r=1M
    R6 (rop_op ovp_op) resistor r=1M
    R5 (rop_op ilim_op) resistor r=1M
    R4 (en_op rop_op) resistor r=1k
    R3 (pin10 vout) resistor r=.001
    R2 (pin9 vout) resistor r=.001
    R1 (pin2 vin) resistor r=.001
    R0 (pin1 vin) resistor r=0.001
    C0 (net052 vout) capacitor c=100p
    G1 (flag gnd net022 gnd) vccs gm=1.0 type=vcr
    G0 (vin net21 rop_op gnd) vccs gm=1.0 type=vcr
    V17 (net060 gnd) vsource dc=-100 type=dc
    V16 (net057 gnd) vsource dc=800.0m type=dc
    V15 (net043 gnd) vsource dc=3.3 type=dc
    V14 (net044 gnd) vsource dc=3.3 type=dc
    V13 (net042 gnd) vsource dc=2 type=dc
    V12 (net015 gnd) vsource dc=300 type=dc
    V11 (net039 gnd) vsource dc=800.0m type=dc
    V_vcsel_en (net033 gnd) vsource dc=800.0m type=dc
    Ven_hi (net035 gnd) vsource dc=800.0m type=dc
    V7 (net023 vout) vsource dc=30.00m type=dc
    Vsense (net21 vout) vsource dc=0 type=dc
    V5 (pin8 ilim) vsource dc=0 type=dc
    V4 (pin7 en) vsource dc=0 type=dc
    V3 (pin6 flag) vsource dc=0 type=dc
    V2 (pin5 vc_sel) vsource dc=0 type=dc
    V1 (pin4 imon) vsource dc=0 type=dc
    V0 (pin3 gnd) vsource dc=0 type=dc
    F1 (vin ilim) cccs gain=0.004 type=cccs min=-40m max=40m probe=Vsense
    F0 (vin imon) cccs gain=0.001 type=cccs min=-10m max=10m probe=Vsense
ends SPICE_model
// End of subcircuit definition.