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NB6L14MMNGEVB:  CML Clock/Data Fanout Buffer Evaluation Board

The NB6L14M is a 3.0GHz differential 1:4 CML clock or data fanout buffer. The differential inputs incorporate internal 50-ohm termination resistors that are accessed through the VT pin. This feature allows the NB6L14M to accept various logic standards, such as CML, LVCMOS, LVTTL, CML, or LVDS logic levels. The 16mA differential CML outputs provide matching internal 50-ohm terminations and produce 400mV output swings when externally terminated with a 50-ohm resistor to VCC. The VREFAC reference output can be used to rebias capacitor-coupled differential or single-ended input signals. The 1:4 fanout design was optimized for low output skew applications. The NB6L14M is a member of the ECLinPS MAX family of high performance clock and data management products.
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产品 状况 Compliance 简短说明 所用产品 行动
NB6L14MMNGEVB Active
Pb-free
CML Clock/Data Fanout Buffer Evaluation Board NB6L14MMNG
技术文档
类型 文档标题 文档编号/大小 修订号
Eval Board: Manual NB6L14MMNGEVB Manual EVBUM2183/D - 620.0 KB  0 
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