ESD Protection Diodes | PACVGA105

ESD 保护二极管，VGA 端口伴随电路

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PACVGA105 为 PC 的 VGA 端口中常见的信号线提供 7 沟道 ESD 保护。ESD 保护采用电流引导二极管实现，该二极管设计用于安全处理与 IEC-61000-4-2 四级 ESD 保护标准（±8kV 触点放电）相关的高峰值浪涌电流。当沟道受到静电放电影响，通过保护二极管将 ESD 电流脉冲转移到正电源轨或地面，使其安全地消除。R、G 和 B 沟道的上 ESD 二极管连接一个单独的电源轨 (VRGB)，以便与低压电源的图形控制器集成电路联接。其余沟道连接主 5V 轨 (VCC)。R、G 和 B 沟道的下二极管还连接至专用接地引脚 (GNDA)，以减少由于公用接地阻抗而产生的串扰。该集成电路还包含两个非反相缓冲器，缓冲来自图形控制器集成电路的 HSYNC 和 VSYNC 信号。这些缓冲器接受 TTL 输入电平并将其转换为在 GND 和 VCC 之间摆动的 CMOS 输出电平。这些驱动器有一个标称 60Ω 输出阻抗，与视频电缆通常采用的 HSYNC 和 VSYNC 线路特性阻抗匹配。这些驱动器的输入还具有高上拉阻抗（标称 50kW），可上拉到 VAUX 电源轨。此外，DDC_CLOCK 和 DDC_DATA 沟道具有 1.8kΩ 电阻，可将这些输入上拉至主 5V (VCC) 电源轨。

  • ESD protection and termination resistors for VGA (video) port interfaces
  • Digital TV, Set Top Box, PC/Notebook, Gaming
  • Seven channels of ESD protection designed to meet IEC-61000-4-2 Level-4 ESD requirements (±8kV contact discharge)
  • Very low loading capacitance from ESD protection diodes at less than 5pF typical
  • TTL to CMOS level-translating buffers for the HSYNC and VSYNC lines
  • Three independent supply pins (VCC, VRGB and VAUX) to facilitate operation with sub-micron Graphics Controller ICs
  • High impedance pull-ups (50kΩ nominal to VAUX) for HSYNC and VSYNC inputs
  • Pull-up resistors (1.8kΩ nominal to VCC) for DDC_CLK and DDC_DATA lines

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Pb

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H

P

QSOP-16

492-01

1

260

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2500

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VGA

7

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1.7

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10

0.75

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