此类 N 沟道逻辑电平增强型电场效应晶体管是使用 Fairchild 的高单元密度 DMOS 专属技术生产的。这种极高密度工艺特别适用于最大程度降低导通电阻。此类器件特别适用于笔记本电脑、手机、PCMCIA 卡和其他电池供电电路等低压应用,在此类应用中需要在非常小形的表面贴装封装中实现快速开关和线路内低功率损耗。
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Wide SOA Mosfets
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V(BR)DSS Min (V)
RDS(on) Max @ VGS = 10 V (mΩ)
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RDS(on) Max @ VGS = 2.5 V (mΩ)
RDS(on) Max @ VGS = 4.5 V (mΩ)
Qg Typ @ VGS = 4.5 V (nC)
Qg Typ @ VGS = 10 V (nC)
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Qgd Typ @ VGS = 4.5 V (nC)
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可靠性数据
Die Related Summary Data
Device: NDS331N
Equivalent to wafer fab process: TP
产品技术
产品技术
等效器件小时
平均故障间隔时间/平均无故障时间(按小时计算)
FITS
TP
8
1061074922
More Details
Re-calculate Data
Data is based on the following assumptions.
Note: The temperature and confidence level may be adjusted to your requirements.
Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)