这些集成式负载开关是使用安森美半导体专有的高单元密度 DMOS 技术生产的。这种极高密度工艺特别适用于最大程度降低导通电阻,可提供卓越的开关性能。此类器件特别适用于需要低导通损耗和简单驱动的低电压高压侧负载开关应用。
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CAD Models
Compliance
Package Type
Case Outline
MSL Type
MSL Temp (°C)
Container Type
Container Qty.
ON Target
Over Current - Shutdown (Y/N)
Over Current - Current Source (Y/N)
Current Limit (FIXED/ADJ/NO)
Over Voltage Protection (Y/N)
Reverse Current Blocking (Y/N)
FAULT Signal (Y/N)
PGOOD (Y/N)
UVLO (Y/N)
Rds(on) Typ (mΩ)
Max Current (A)
Output Discharge (Y/N)
IMON Output (Y/N)
Adjustable Slew Rate (Y/N)
Vin Min (V)
Vin Max (V)
Iq (µA)
eFuse / Hot Plug (Y/N)
Input / Output
Product Family
Reference Price
FDC6324L
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可靠性数据
Die Related Summary Data
Device: FDC6324L
Equivalent to wafer fab process: TP
产品技术
产品技术
等效器件小时
平均故障间隔时间/平均无故障时间(按小时计算)
FITS
TP
8
738717284
More Details
Re-calculate Data
Data is based on the following assumptions.
Note: The temperature and confidence level may be adjusted to your requirements.
Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)