Latches & Registers | 74VHC594
8-Bit Shift Register with Output Register
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概览
8-bit shift register designed for 2.0 V to 5.5 V VCC operation. The device contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks (RCLK, SRCLK) and direct overriding clear ( ̅R̅̅C̅̅L̅̅R̅ , ̅S̅̅R̅̅C̅̅L̅̅R̅ ) inputs are provided on the shift and storage registers. A serial output (QH’) is provided for cascading purposes. The shift-register (SRCLK) and storage-register (RCLK) clocks are positive-edge triggered. If the clocks are tied together,
the shift register always is one clock pulse ahead of the storage register.
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- 2.0 V to 5.5 V VCC Operation
- High Speed: fmax = 185 MHz (Typ) at VCC = 5 V
- Low Power Dissipation: ICC = 4 μA (Max) at TA = 25°C
- High Noise Immunity: VNIH = VNIL = 28% VCC
- Power Down Protection Provided on Inputs
- Balanced Propagation Delays
- Low Noise: VOLP = 1.0 V (Max)
- NLV Prefix for Automotive and Other Applications RequiringUnique Site and Control Change Requirements
- AEC−Q100 Qualified and PPAP Capable
- These Devices are Pb−Free, Halogen Free/BFR Free andRoHS Compliant
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