Skew Management | MC100EP196
概览
The MC100EP196 is a programmable delay chip (PDC) designed primarily for clock deskewing and timing adjustment. It provides programmably variable delay of a differential ECL input signal. It has similar architecture to the EP195 with the added feature of further tuneability in delay using the FTUNE pin. The FTUNE input takes an analog voltage from VCC to VEE to fine tune the output delay from 0 to 60 ps.
- Maximum Frequency > 1.2 GHz Typical
- PECL Mode Operating Range: VCC = 3.0 V to 3.6 V with VEE = 0 V
- NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -3.6 V
- Open Input Default State
- Safety Clamp on Inputs
- A Logic High on the ENbar Pin Will Force Q to Logic Low
- D[0:10] Can Accept Either ECL, LVCMOS, or LVTTL Inputs
- VBB Output Reference Voltage
- Pb-Free Packages are Available
产品参数及购买信息
搜寻
Close Search
产品:
2
分享
排序方式
产品系列:
┗
可订购器件:
2
Show More
1-25 of 25
Products per page
Jump to :
1
支持服务
联系安森美销售团队获得支持，查询或者对比产品细节。
联系销售
