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-3.3 V / -5 V Differential ECL to +3.3 V LVTTL Translator
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MC100EPT25/D (160kB) |
17 |
Aug, 2016 |
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-3.3 V / -5 V Triple ECL Input to LVPECL Output Translator
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MC100LVEL90/D (143kB) |
12 |
Jul, 2016 |
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1.1 GHz Dual Modulus Prescaler
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MC12026A/D (135kB) |
9 |
Aug, 2016 |
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1.1 GHz Prescaler
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MC12080/D (101.0kB) |
7 |
May, 2013 |
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1.2 V Dual Channel CMOS Buffer / Translator
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NB3U23C/D (70kB) |
6 |
Apr, 2014 |
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1.8 V / 2.5 V 10Gbps Equalizer Receiver with 1:6 Differential CML Outputs
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NB7VQ1006M/D (1256kB) |
3 |
Aug, 2016 |
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1.8 V / 2.5 V Differential 2 x 2 Crosspoint Switch with CML Outputs Clock/Data Buffer/Translator
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NB7V72M/D (155.0kB) |
1 |
Oct, 2009 |
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1.8V / 2.5V /3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 CML Clock/Data Fanout / Translator
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NB7VQ572M/D (170.0kB) |
P0 |
Oct, 2010 |
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1.8V / 2.5V CML 12.5 Gbps Programmable Pre-Emphasis Copper/Cable Driver with Selectable Equalizer Receiver
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NB7VPQ16M/D (3635.0kB) |
0 |
Jul, 2009 |
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1.8V / 2.5V, 10GHz /4 Clock Divider with CML Outputs
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NB7V33M/D (161.0kB) |
2 |
Jan, 2010 |
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1.8V / 2.5V, 10GHz ÷2 Clock Divider with CML Outputs
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NB7V32M/D (128.0kB) |
5 |
Aug, 2010 |
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1.8V Differential 2:1 Mux Input to 1.2V/1.8V 1:6 CML Clock/Data Fanout Buffer /Translator
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NB7V586M/D (134.0kB) |
0 |
Sep, 2008 |
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1.8V/2.5V/3.3V 8GHz /14Gbps Differential 1:4 Clock / Data CML Fanout Buffer w/ Selectable Input Equalizer
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NB7VQ14M/D (167.0kB) |
0 |
Dec, 2010 |
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2 x 2 Crosspoint Switch, Dual, 3.3 V, 3.2 Gb / s, with CML Outputs
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NB4N840M/D (102kB) |
5 |
Aug, 2014 |
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2-Bit Dual Supply Level Translator
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NLSX4302E/D (166.0kB) |
0 |
Jul, 2012 |
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2.5 V / 3.3 V ECL Dual Differential 2:1 Multiplexer
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NB100LVEP56/D (105kB) |
11 |
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2.5 V / 3.3 V 1:4 Differential Input ot LVDS Fanout Buffer / Translator
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NB3L8504S/D (243kB) |
2 |
Apr, 2016 |
2.5 V / 3.3 V Any Level Positive Input to -3.3 V/-5.5 V NECL
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MC100EP91/D (175kB) |
7 |
Mar, 2021 |
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2.5 V / 3.3 V ECL 1:2 Differential Fanout Buffer
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MC10LVEP11/D (243kB) |
14 |
Aug, 2016 |
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2.5 V / 3.3 V ECL Differential Receiver/Driver
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MC10LVEP16/D (191kB) |
12 |
Aug, 2016 |
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2.5 V /3.3 V 3:1:10 Configurable Differential Clock Fanout Buffer with LVCMOS Reference Output
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NB3M8T3910/D (181kB) |
3 |
May, 2018 |
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2.5 V 1:2 AnyLevel Input to LVDS Fanout Buffer / Translator
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NB6L11S/D (225kB) |
9 |
Nov, 2014 |
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2.5 V 1:4 AnyLevel Differential Input to LVDS Fanout Buffer/Translator
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NB6L14S/D (235.0kB) |
2 |
Oct, 2011 |
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2.5 V, 3.3 V Differential 1:2 HCSL Fanout Buffer
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NB3L202K/D (137kB) |
4 |
Jan, 2018 |
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2.5 V/3.3 V 3.0 GHz Differential 1:4 CML Fanout Buffer
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NB6L14M/D (103.0kB) |
3 |
Apr, 2008 |
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2.5 V/3.3 V 3.0 GHz Differential 1:4 LVPECL Fanout Buffer
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NB6L14/D (194.0kB) |
5 |
May, 2012 |
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2.5 V/3.3 V Any Level Positive Input to -2.5 V/-3.3 V LVNECL Output Translator
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NB100LVEP91/D (144kB) |
20 |
Jun, 2018 |
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2.5 V/3.3 V SiGe Differential Smart Gate with Output Level Select
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NB7L86A/D (389kB) |
0 |
Dec, 2019 |
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2.5V / 3.3V 1:2 Differential CML Fanout Buffer
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NB6L11M/D (151.0kB) |
4 |
Aug, 2009 |
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2.5V / 3.3V 1:2 Differential LVPECL Clock / Data Fanout Buffer
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NB6L611/D (189.0kB) |
4 |
Aug, 2009 |
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2.5V / 3.3V 1:5 Differential ECL/PECL/HSTL Clock Driver
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MC100LVEP14/D (90kB) |
14 |
Apr, 2014 |
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2.5V / 3.3V 1:5 Dual Differential ECL/PECL/HSTL Clock Driver
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MC100LVEP210/D (103kB) |
15 |
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2.5V / 3.3V 1:8 CML Fanout
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NB7L1008M/D (141kB) |
1 |
Oct, 2013 |
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2.5V / 3.3V 1:8 LVPECL Fanout Buffer
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NB7L1008/D (180kB) |
1 |
Apr, 2014 |
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2.5V / 3.3V 2:1:10 Differential ECL/PECL/HSTL Clock Driver
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MC100LVEP111/D (173kB) |
23 |
Aug, 2015 |
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2.5V / 3.3V Differential 2 X 2 Crosspoint Switch with LVPECL Outputs
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NB6L72/D (134.0kB) |
4 |
Apr, 2008 |
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2.5V / 3.3V Differential 2 x 2 Crosspoint Switch with CML Outputs Clock/Data Buffer / Translator
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NB7L72M/D (85kB) |
4 |
Jan, 2017 |
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2.5V / 3.3V Differential 4:1 Mux Input to 1:2 LVPECL Clock/Data Fanout /Translator
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NB7L572/D (134.0kB) |
2 |
Jun, 2012 |
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2.5V / 3.3V Differential 4:1 Mux to 1:2 CML Clock/Data Fanout / Translator
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NB6L572M/D (156.0kB) |
1 |
Nov, 2009 |
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2.5V / 3.3V Differential LVPECL 2x2 Clock Switch and Low Skew Fanout Buffer
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NB4L6254/D (155.0kB) |
3 |
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2.5V / 3.3V Dual Channel Programmable Clock/Data Delay with Differential CML Outputs
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NB6L295M/D (193.0kB) |
5 |
Mar, 2012 |
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2.5V / 3.3V Dual Channel Programmable Clock/Data Delay with Differential LVPECL Outputs
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NB6L295/D (192.0kB) |
4 |
Mar, 2012 |
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2.5V / 3.3V ECL /2, /4, /8 Clock Generation Chip
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MC100LVEP34/D (100kB) |
12 |
Apr, 2021 |
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2.5V / 3.3V ECL 2−Input Differential AND/NAND
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MC100LVEP05 (155.0kB) |
3 |
Apr, 2021 |
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2.5V / 3.3V ECL Quad Differential Driver/Receiver
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NB100LVEP17/D (99kB) |
8 |
May, 2014 |
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2.5V 1:5 Dual Differential LVDS Clock Driver
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MC100EP210S/D (138.0kB) |
10 |
Jun, 2011 |
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2.5V, 3.3V Differential 1:4 HCSL Fanout Buffer
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NB3L204K/D (400kB) |
1 |
Oct, 2017 |
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2.5V, 3.3V Differential 1:8 HCSL Fanout Buffer
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NB3L208K/D (200kB) |
3 |
Oct, 2017 |
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2.5V/3.3V 1:5 LVPECL Fanout Buffer
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NB3L853141/D (107kB) |
2 |
Dec, 2015 |
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2.5V/3.3V 2:1:15 Differential ECL/PECL w/1 and w/2 Clock Driver
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NB100LVEP222/D (134kB) |
13 |
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