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Control Loop Design and Easy Verification Method

A simple methodology is shown, applied to measure and optimize the control loop of a switching system. After a brief introduction to control loop theory and stability criteria, the evaluation of such system is explained. The use of a PWM simulation model is shown in practice to predict loop stability, together with a quick overview of obtainable results. A straightforward method to implement control loop measurement on a real environment is presented, followed by an optimization method using standard calculation-tools.



Didier Balocco
EMEA Power Solution Group Technical Marketing Engineer, ON Semiconductor

Didier received his Electronics Engineer diploma in the "École Nationale Supérieure d’Électronique et de RadioÉlectricité de Bordeaux", France in 1992 and his Ph. D. degree in Power Electronics form the University of Bordeaux in 1997.

In 1996, he joined AEG Power Solutions, formerly Alcatel Converters, as a research engineer for dc-dc and ac-dc converters design in a range of 1W to 1kW mainly for telecom equipment. He managed the research activities from 2000 to 2014. He published more than 10 papers on power electronics. From 2011 to 2013, he worked 18 months on a 15 kW solar inverter module for a 150 kW cabinet in Dallas, Texas, USA.

His main interests during that period were switching mode power supply, converter stability and modeling, high power factor rectifiers.

He joined Fairchild Semiconductor in August 2014 as a Field Application Engineer supporting South of France, Spain and Portugal. He is currently an EMEA Power Solution Group Technical Marketing Engineer.



Agenda

(Click on seminar technical session titles for more information)

8:30am – 9:00am - Registration & Coffee
10:00am – 11:00am - PFC: Bridgeless vs. Interleaved
11:00am – 11:10am - Break
11:10am – 12:10am - Control Loop Design
12:10am – 1:30pm - Lunch & Expo
3:00pm – 3:10pm - Break
3:55pm – 4:55pm - Design with SiC MOSFETs
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