ASIC技术
安森美半导体支持全面的标准单元ASIC技术,以适应具体设计要求。
系列 |
内核 电压 |
I/O 电压 |
I/O 类型 |
系统 性能 |
独特特性 |
FPGA转换目标 |
5 V |
5 V 3.3 V |
PCI33, TTL, LVTTL, LVCMOS |
75 MHz |
长期5 V支援, 高温 |
Legacy FPGAs & PLDs |
|
3.3 V 2.5 V |
5 V 3.3 V |
PCI33/66, GTL, HSTL, SSTL, LVTTL, LVCMOS, LVPECL |
100 MHz |
Freeprom,高温 |
Virtex-1®, Spartan2®, APEX 20K®, Acex®, ProASIC Plus/500K® |
|
5.0 V 3.3 V 1.8 V 1.5 V |
5.0 V 3.3 V 2.5 V 1.8 V |
PCI33/66 HSTL, SSTL, LVTTL, LVCMOS, LVPECL, LVDS , DCI |
266 MHz |
非易失性存储器(NVM), 一次性可编程(OTP), 高阈值电压(High Vt), 高温 |
Virtex -E®, Virtex II ®, Spartan -IIE®, APEX 20KE®, Stratix®, APEX II®, Cyclone®, Axcelerator® ProASIC3® |
|
SP110 0.11 µm |
1.2 V |
3.3 V 2.5 V 1.8 V 1.5 V 1.2 V |
PCI33/66, PCIX, HSTL, SSTL, LVTTL, LVCMOS, LVPECL, LVDS, DCI, CML |
450 MHz |
OTP, 双电源能力, 未来将支持军用温度 |
Virtex-4 ®, Spartan-3 /6®, APEX-II ®, Stratix -II ®, Cyclone II/III/IV®, Arria®, IGLOO® |
SP65 65 nm |
1.0 V 1.2 V |
3.3 V 2.5 V 1.8 V 1.5 V 1.2 V |
PCI33/66, PCIX, HSTL, SSTL, LVTTL, LVCMOS, LVPECL, LVDS, DCI, CML |
600 MHz | 宽广的IP阵容 | Virtex-6®, Virtex-7®, Artix-7®, Kintex-7®, Stratix III/IV®, Arria II® |
SP40 40 nm |
0.9 V 1.1 V |
3.3 V 2.5 V 1.8 V 1.5 V 1.2 V |
PCI33/66, PCIX, HSTL, SSTL, LVTTL, LVCMOS, LVPECL, LVDS, DCI, CML |
850 MHz | 宽广的IP阵容 | Virtex-7®,
Artix-7®, Kintex-7®, Stratix V® |